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PDF UPD4664312-X Data sheet ( Hoja de datos )
| Número de pieza | UPD4664312-X | |
| Descripción | 64M-BIT CMOS MOBILE SPECIFIED RAM 4M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION | |
| Fabricantes | NEC | |
| Logotipo |  |
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PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µPD4664312-X
64M-BIT CMOS MOBILE SPECIFIED RAM
4M-WORD BY 16-BIT
EXTENDED TEMPERATURE OPERATION
Description
The µPD4664312-X is a high speed, low power, 67,108,864 bits (4,194,304 words by 16 bits) CMOS Mobile
Specified RAM featuring Low Power Static RAM compatible function and pin configuration.
The µPD4664312-X is fabricated with advanced CMOS technology using one-transistor memory cell.
The µPD4664312-X is packed in 93-pin TAPE FBGA.
Features
• 4,194,304 words by 16 bits organization
• Fast access time: 65, 75 ns (MAX.)
• Fast page access time: 18, 25 ns (MAX.)
• Byte data control: /LB (I/O0 to I/O7), /UB (I/O8 to I/O15)
• Low voltage operation: 2.7 to 3.1 V (-B65X)
2.7 to 3.1 V (Chip), 1.65 to 2.1 V (I/O) (-BE75X)
• Operating ambient temperature: TA = –25 to +85 °C
• Output Enable input for easy application
• Chip Enable input: /CS pin
• Standby Mode input: MODE pin
• Standby Mode1: Normal standby (Memory cell data hold valid)
• Standby Mode2: Density of memory cell data hold is variable
www.DataShµePeDt44U6.6c4o3m12
Access
time
ns (MAX.)
Operating supply
voltage
V
Operating
ambient At operating
temperature mA (MAX.)
Supply current
At standby µA (MAX.)
Density of data hold
Chip
I/O
°C
64M bits 16M bits 8M bits 4M bits 0M bit
-B65X
-BE75X Note
65 2.7 to 3.1 – –25 to +85 45 100 60 50 45 10
75 2.7 to 3.1 1.65 to 2.1
40
Note Under development
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M15867EJ5V0DS00 (5th edition)
Date Published August 2002 NS CP (K)
Printed in Japan
The mark shows major revised points.
©
2001
1 page  
Block Diagram
VCC
VCCQ
GND
A0
A21
I/O0 to I/O7
I/O8 to I/O15
µPD4664312-X
Standby mode control
Refresh
control
Refresh
counter
Address
buffer
Row
decoder
Input data
controller
Memory cell array
67,108,864 bits
Sense amplifier /
Switching circuit
Column decoder
Address buffer
Output data
controller
/CS
MODE
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/LB
/UB
/WE
/OE
Remark VCCQ is the input / output power supply for -BE75X.
Preliminary Data Sheet M15867EJ5V0DS
5
5 Page 
µPD4664312-X
3. Page Read Operation
3.1 Features of Page Read Operation
Features
8 Words Mode
Page length
Page read-corresponding addresses
Page read start address
Page direction
Interrupt during page read operation
8 words
A2, A1, A0
Don’t care
Don’t care
Enabled Note
Note An interrupt is output when /CS = H or in case A3 or a higher address changes.
3.2 Page Length
8 words is supported as the page lengths.
3.3 Page-Corresponding Addresses
The page read-enabled addresses are A2, A1, and A0. Fix addresses other than A2, A1, and A0 during page read
operation.
3.4 Page Start Address
Since random page read is supported, any address (A2, A1, A0) can be used as the page read start address.
3.5 Page Direction
Since random page read is possible, there is not restriction on the page direction.
3.6 Interrupt during Page Read Operation
When generating an interrupt during page read, either make /CS high level or change A3 and higher addresses.
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3.7 When page read is not used
Since random page read is supported, even when not using page read, random access is possible as usual.
Preliminary Data Sheet M15867EJ5V0DS
11
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