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AOZ8900 の電気的特性と機能

AOZ8900のメーカーはAlpha & Omega Semiconductorsです、この部品の機能は「Ultra-Low Capacitance TVS Diode Array」です。


製品の詳細 ( Datasheet PDF )

部品番号 AOZ8900
部品説明 Ultra-Low Capacitance TVS Diode Array
メーカ Alpha & Omega Semiconductors
ロゴ Alpha & Omega Semiconductors ロゴ 




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AOZ8900 Datasheet, AOZ8900 PDF,ピン配置, 機能
AOZ8900
Ultra-Low Capacitance TVS Diode Array
General Description
The AOZ8900 is a transient voltage suppressor array
designed to protect high speed data lines from Electro
Static Discharge (ESD) and lightning.
This device incorporates eight surge rated, low
capacitance steering diodes and a Transient Voltage
Suppressor (TVS) in a single package. During transient
conditions, the steering diodes direct the transient to
either the positive side of the power supply line or to
ground. They may be used to meet the ESD immunity
requirements of IEC 61000-4-2, Level 4 (±15kV air,
±8kV contact discharge).
The AOZ8900 comes in RoHS compliant SOT-23
package. It is rated over a -40°C to +85°C ambient
temperature range.
Features
ESD protection for high-speed data lines:
Exceeds: IEC 61000-4-2 (ESD) ±15kV (air),
±8kV (contact)
IEC 61000-4-5 (Lightning) 5A (8/20µs)
Human Body Model (HBM) ±15kV
Small package saves board space
Low insertion loss
Protects four I/O lines
Low clamping voltage
Low operating voltage: 5.0V
Applications
USB 2.0 Power and Data Line Protection
Video Graphics Cards
Monitors and Flat Panel Displays
Digital Video Interface (DVI)
Typical Application
www.DataSheet4U.com
USB Host
Controller
RT
RT
VBUS
AOZ8900
Downstream
+5V Ports
VBUS
D+
D-
GND
RT
RT
Figure 1. 2 USB High Speed Ports
+5V
VBUS
D+
D-
GND
Rev. 1.7 October 2008
www.aosmd.com
Page 1 of 9

1 Page





AOZ8900 pdf, ピン配列
AOZ8900
Electrical Characteristics
TA = 25°C unless otherwise specified
Symbol
Parameter
VRWM
VBR
IR
VF
VCL
Cj
ΔCj
Reverse Working Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Diode Forward Voltage
Channel Clamp Voltage
Positive Transients
Negative Transient
Channel Clamp Voltage
Positive Transients
Negative Transient
Channel Clamp Voltage
Positive Transients
Negative Transient
Junction Capacitance
Channel Input Capacitance
Matching
Conditions
Between pin 5 and 2(4)
IT = 1mA, between pins 5 and 2(5)
VRWM = 5V, between pins 5 and 2
If = 15mA
GIPrPo=un1dA(3,)t(p6)(=8)100ns, any I/O pin to
GIPrPo=un5dA(3,)t(p6)(=8)100ns, any I/O pin to
GIPrPo=un1d2(3A),(6t)p(8=) 100ns, any I/O pin to
VR = 0V, f = 1Mhz, any I/O pin to Ground(3)(7)
VR = 0V, f = 1Mhz, between I/O pins(3)(7)
Min.
6.6
0.7
Typ.
0.85
1.25
Max.
5.5
1
0.95
10.50
-2.00
12.50
-3.50
15.50
-5.00
1.3
0.03
Notes:
3. These specifications are guaranteed by design.
4. The working peak reverse voltage, VRWM, should be equal to or greater than the DC or continuous peak operating voltage level.
5. VBR is measured at the pulse test current IT.
6. Measurements performed with no external capacitor on VP (Pin 5 floating).
7. Measurements performed with VP biased to 3.3 Volts (Pin 5 @ 3.3V).
8. Measurements performed using a 100 nSec Transmission Line Pulse (TLP) system.
Units
V
V
µA
V
V
V
V
V
V
V
pF
pF
www.DataSheet4U.com
Rev. 1.7 October 2008
www.aosmd.com
Page 3 of 9


3Pages


AOZ8900 電子部品, 半導体
AOZ8900
TPBIASx
TPAx+
IEEE 1394
PHY TPAx-
TPBx+
TPBx-
GND
1μ 56Ω 56Ω
56Ω 56Ω
5.1kΩ 270p
IEEE1394 Port Connection
IEEE 1394
Connector
AOZ8900
www.DataSheet4U.com
Rev. 1.7 October 2008
www.aosmd.com
Page 6 of 9

6 Page



ページ 合計 : 9 ページ
 
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共有リンク

Link :


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