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WV3HG128M72AER-D6 の電気的特性と機能

WV3HG128M72AER-D6のメーカーはWhite Electronic Designsです、この部品の機能は「1GB - 128Mx72 DDR2 SDRAM REGISTERED」です。


製品の詳細 ( Datasheet PDF )

部品番号 WV3HG128M72AER-D6
部品説明 1GB - 128Mx72 DDR2 SDRAM REGISTERED
メーカ White Electronic Designs
ロゴ White Electronic Designs ロゴ 




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WV3HG128M72AER-D6 Datasheet, WV3HG128M72AER-D6 PDF,ピン配置, 機能
White Electronic Designs WV3HG128M72AER-D6
ADVANCED*
1GB – 128Mx72 DDR2 SDRAM REGISTERED, w/PLL
FEATURES
240-pin, dual in-line memory module
Fast data transfer rates: PC2-6400*, PC2-5300*,
PC2-4300 and PC2-3200
Utilizes 800, 667, 533 and 400 MT/s DDR2 SDRAM
components
VCC = VCCQ = 1.8V
JEDEC standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
Four-bit prefetch architecture
DLL to align DQ and DQS transitions with CK
Multiple internal device banks for concurrent
operation
Supports duplicate output strobe (RDQS/RDQS#)
Programmable CAS# latency (CL): 3, 4, 5 and 6
Adjustable data-output drive strength
On-die termination (ODT)
Posted CAS# latency: 0, 1, 2, 3 and 4
Serial Presence Detect (SPD) with EEPROM
64ms: 8,192 cycle refresh
Gold edge contacts
wwwP.DraotdauSchteiest4leUa.cdo-mfree
RoHS compliant
Package option
• 240 Pin DIMM
• PCB – 29.97mm (1.18") Max
DESCRIPTION
The WV3HG128M72AER is a 128Mx72 Double Data Rate
DDR2 SDRAM high density module. This memory module
consists of eighteen 128Mx4 bit with 4 banks DDR2
Synchronous DRAMs in FBGA packages, mounted on a
240-pin DIMM FR4 substrate.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
NOTE: Consult factory for availability of:
• Vendor source control options
• Industrial temperature option
Clock Speed
CL-tRCD-tRP
* Consult factory for availability
PC2-3200
200MHz
3-3-3
OPERATING FREQUENCIES
PC2-4300
266MHz
4-4-4
PC2-5300*
333MHz
5-5-5
PC2-6400*
400MHz
6-6-6
March 2005
Rev. 0
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

1 Page





WV3HG128M72AER-D6 pdf, ピン配列
White Electronic Designs WV3HG128M72AER-D6
ADVANCED
FUNCTIONAL BLOCK DIAGRAM
VSS
RS0#
DQS0
DQS0#
DQ0
DQ1
DQ2
DQ3
DQS1
DQS1#
DQ8
DQ9
DQ10
DQ11
DQS2
DQS2#
DQ16
DQ17
DQ18
DQ19
DQS3
DQS3#
DQ24
DQ25
DQ26
DQ27
DQS4
DQS4#
DQ32
DQ33
DQ34
DQ35
DQS5
DQS5#
DQ40
DQ41
DQ42
DQ43
DQS6
DQS6#
DQ48
DQ49
DQ50
www.DataSheet4U.DcQ5o1 m
DQS7
DQS7#
DQ56
DQ57
DQ58
DQ59
DQS8
DQS8#
CB0
CB1
CB2
CB3
DM
I/O 0
I/O 1
I/O 2
I/O 3
DM
I/O 0
I/O 1
I/O 2
I/O 3
DM
I/O 0
I/O 1
I/O 2
I/O 3
DM
I/O 0
I/O 1
I/O 2
I/O 3
DM
I/O 0
I/O 1
I/O 2
I/O 3
DM
I/O 0
I/O 1
I/O 2
I/O 3
DM
I/O 0
I/O 1
I/O 2
I/O 3
DM
I/O 0
I/O 1
I/O 2
I/O 3
DM
I/O 0
I/O 1
I/O 2
I/O 3
CS# DQS DQS#
CS# DQS DQS#
CS# DQS DQS#
CS# DQS DQS#
CS# DQS DQS#
CS# DQS DQS#
CS# DQS DQS#
CS# DQS DQS#
CS# DQS DQS#
DM0/DQS9
NC/DQS9#
DQ4
DQ5
DQ6
DQ7
DM1/DQS10
NC/DQS10#
DQ12
DQ13
DQ14
DQ15
DM2/DQS11
NC/DQS11#
DQ20
DQ21
DQ22
DQ23
DM3/DQS12
NC/DQS12#
DQ28
DQ29
DQ30
DQ31
DM4/DQS13
NC/DQS13#
DQ36
DQ37
DQ38
DQ39
DM5/DQS14
NC/DQS14#
DQ44
DQ45
DQ46
DQ47
DM6/DQS15
NC/DQS15#
DQ52
DQ53
DQ54
DQ55
DM7/DQS16
NC/DQS16#
DQ60
DQ61
DQ62
DQ63
DM8/DQS17
NC/DQS17#
CB4
CB5
CB6
CB7
S0#
BA0 - BA1
A0 - A13
RAS#
CAS#
WE#
CKE0
ODT0
RESET#
PCK7
PCK7#
1:2
R
E
G
I
S
T
E
R
RST#
RS0# : DDR2 SDRAMs
RBA0 - RBA1 : DDR2 SDRAMs
RA0 - RA13 : DDR2 SDRAMs
RRAS# : DDR2 SDRAMs
RCAS# : DDR2 SDRAMs
RWE# : DDR2 SDRAMs
RCKE0 : DDR2 SDRAMs
RODT0 : DDR2 SDRAMs
NOTE: All resistor values are 22 ohms unless otherwise specified.
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
Serial PD
SCL
WP A0 A1 A2
SA0 SA1 SA2
SDA
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
DM CS# DQS DQS#
I/O 0
I/O 1
I/O 2
I/O 3
VCCSPD
VCC/VCCQ
VREF
VSS
Serial PD
DDR2 SDRAMs
DDR2 SDRAMs
DDR2 SDRAMs
CK0
CK0#
RESET#
P
L
L
OE
PCK0-PCK6, PCK8, PCK9 CK : DDR2 SDRAMs
PCK0#-PCK6#, PCK8#, PCK9#
PCK7 CK : Register
PCK7# CK# : Register
CK# : DDR2 SDRAMs
March 2005
Rev. 0
3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com


3Pages


WV3HG128M72AER-D6 電子部品, 半導体
White Electronic Designs WV3HG128M72AER-D6
ADVANCED
AC TIMING PARAMETERS
0°C ≤ TA ≤ +70°C; VCCQ = + 1.8V ± 0.1V, VCC = +1.8V ± 0.1V
AC CHARACTERISTICS
534
PARAMETER
Clock cycle time
CL = 4
CL = 3
CK high-level width
CK low-level width
Half clock period
DQ output access time from CK/CK#
Data-out high-impedance window from CK/CK#
Data-out low-impedance window from CK/CK#
DQ and DM input setup time relative to DQS
DQ and DM input hold time relative to DQS
A DQ and DM input pulse width (for each input)
Data hold skew factor
DQ…DQS hold, DQS to first DQ to go nonvalid, per access
DQS input high pulse width
DQS input low pulse width
DQS output access time from CK/CK#
DQS falling edge to CK rising … setup time
DQS falling edge from CK rising … hold time
DQS…DQ skew, DQS to last DQ valid, per group,
per access
DQS read preamble
DQS read postamble
DQS write preamble
DQS write postamble
www.DWaritteaScohmemeat4nUd t.ocofirmst DQS latching transition
SYMBOL
tCK (4)
tCK (3)
tCH
tCL
tHP
tAC
tHZ
tLZ
tDS
tDH
tDIPW
tQHS
tQH
tDQSH
tDQSL
tDQSCK
tDSS
tDSH
tDQSQ
tRPRE
tRPST
tWPRE
tWPST
tDQSS
MIN
3,750
5,000
0.45
0.45
MIN (tCH, tCL)
-500
tAC MIN
100
225
0.35
tHP - tQHS
0.35
0.35
-450
0.2
0.2
0.9
0.4
0.35
0.4
WL - 0.25
MAX
8,000
8,000
0.55
0.55
+500
tAC MAX
tAC MAX
400
+450
300
1.1
0.6
0.6
WL + 0.25
403
MIN MAX
5,000
5,000
8,000
8,000
0.45 0.55
0.45
MIN (tCH, tCL)
-600
tAC MIN
150
275
0.35
tHP - tQHS
0.35
0.35
-500
0.55
+600
tAC MAX
tAC MAX
450
+500
0.2
0.2
UNIT
ps
ps
tCK
tCK
ps
ps
ps
ps
ps
ps
tCK
ps
ps
tCK
tCK
ps
tCK
tCK
350 ps
0.9
0.4
0.35
0.4
WL - 0.25
1.1 tCK
0.6 tCK
tCK
0.6 tCK
WL + 0.25
tCK
Continued on next page
March 2005
Rev. 0
6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

6 Page



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部品番号部品説明メーカ
WV3HG128M72AER-D6

1GB - 128Mx72 DDR2 SDRAM REGISTERED

White Electronic Designs
White Electronic Designs


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