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Número de pieza | AS8NVLC512K32 | |
Descripción | 512K x 32 Module nvSRAM 3.3V High Speed SRAM with Non-Volatile Storage | |
Fabricantes | Austin Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de AS8NVLC512K32 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
No Preview Available ! AUSTIN SEMADICVOANNCDEUCINTFOORR,MINATCI.ON
nvSRAM
Austin Semiconductor, Inc. AS8nvLC512K32
512K x 32 Module nvSRAM
3.3V High Speed SRAM with
Non-Volatile Storage
AVAILABLE AS MILITARY
SPECIFICATIONS
• Military Processing (MIL-STD-883C para 1.2.2)
• Temperature Range -55C to 125C
FEATURES
• -55oC to 125oC Operation
• True non-volatile SRAM (no batteries)
• 20 ns, 25 ns, and 45 ns access times
• Automatic STORE on power down with only a small
capacitor
• STORE to QuantumTrap® nonvolatile elements initiated by
software, device pin, or AutoStore® on power down
• RECALL to SRAM initiated by software or power up
• Infinite Read, Write, and Recall cycles
• 200,000 STORE cycles to QuantumTrap
• 20 year data retention
• Single 3.3V +/- 0.3V operation
• Ceramic Hermetic 68 Quad Flatpak
-Can order with X7R CAPS on package
-Matches compatible pinout footprint of SRAM & EEPROM
Module
FUNCTIONAL DESCRIPTION
The Austin Semiconductor AS8nvLC512K32 is a fast static RAM,
with a nonvolatile element in each memory cell. The memory is
organized as 512K bytes of 8 bits for each of 4 die to form 512Kx32.
The embedded nonvolatile elements incorporate QuantumTrap
technology, producing the world’s most reliable nonvolatile memory.
The SRAM provides infinite read and write cycles, while independent
nonvolatile data resides in the highly reliable QuantumTrap cell.
Data transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down. On
power up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control.
LOGIC BLOCK DIAGRAM
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AS8nvLC512K32
Rev. 0.0 08/09
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
1 page AUSTIN SEMADICVOANNCDEUCINTFOORR,MINATCI.ON
nvSRAM
Austin Semiconductor, Inc. AS8nvLC512K32
Mode Selection (continued)
CE\1Ͳ4
L
WE\1Ͳ4
H
OE\13
L
LHL
LHL
A15ͲA07
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x4B46
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x8FC0
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x4C63
Mode
ReadSRAM
ReadSRAM
ReadSRAM
ReadSRAM
ReadSRAM
AutoStoreEnable
ReadSRAM
ReadSRAM
ReadSRAM
ReadSRAM
ReadSRAM
NonvolatileStore
ReadSRAM
ReadSRAM
ReadSRAM
ReadSRAM
ReadSRAM
Nonvolatile
Recall
I/O0Ͳ31
OutputData
OutputData
OutputData
OutputData
OutputData
OutputData
OutputData
OutputData
OutputData
OutputData
OutputData
OutputHighZ
OutputData
OutputData
OutputData
OutputData
OutputData
OutputHighZ
Power
Active8
ActiveICC28
Active8
Preventing AutoStore
The AutoStore function is disabled by initiating an AutoStore disable
sequence. A sequence of read operations is performed in a manner
similar to the software STORE initiation. To initiate the AutoStore
disable sequence, the following sequence of CE controlled read
operations must be performed:
1. Read address 0x4E38 Valid READ
www.D2a.taRSehaedeat4dUdr.ceossm0xB1C7 Valid READ
3. Read address 0x83E0 Valid READ
4. Read address 0x7C1F Valid READ
5. Read address 0x703F Valid READ
6. Read address 0x8B45 AutoStore Disable
The AutoStore is re-enabled by initiating an AutoStore enable
sequence. A sequence of read operations is performed in a manner
similar to the software RECALL initiation. To initiate the AutoStore
enable sequence, the following sequence of CE controlled read
operations must be performed:
1. Read address 0x4E38 Valid READ
2. Read address 0xB1C7 Valid READ
3. Read address 0x83E0 Valid READ
4. Read address 0x7C1F Valid READ
5. Read address 0x703F Valid READ
6. Read address 0x4B46 AutoStore Enable
If the AutoStore function is disabled or re-enabled, a manual STORE
operation (hardware or software) must be issued to save the AutoStore
state through subsequent power down cycles. The part comes from
the factory with AutoStore enabled.
Data Protection
The AS8nvLC512K32 protects data from corruption during low
voltage conditions by inhibiting all externally initiated
STORE and write operations. The low voltage condition is detected
when VCC < VSWITCH. If the AS8nvLC512K32 is in a write mode
(both CE and WE are LOW) at power up, after a RECALL or STORE,
the write is inhibited until the SRAM is enabled after tLZHSB (HSB
to output active). This protects against inadvertent writes during
power up or brown out conditions.
AS8nvLC512K32
Rev. 0.0 08/09
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
5 Page AUSTIN SEMADICVOANNCDEUCINTFOORR,MINATCI.ON
nvSRAM
Austin Semiconductor, Inc. AS8nvLC512K32
Address
CE
BHE, BLE
WE
Data Input
Data Output
SRAM Write Cycle #2: CE\ Controlled3, 16, 17, 18
tWC
Address Valid
tSA tSCE
tHA
tBW
tPWE
tSD tHD
Input Data Valid
High Impedance
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AS8nvLC512K32
Rev. 0.0 08/09
11
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11 Page |
Páginas | Total 17 Páginas | |
PDF Descargar | [ Datasheet AS8NVLC512K32.PDF ] |
Número de pieza | Descripción | Fabricantes |
AS8NVLC512K32 | 512K x 32 Module nvSRAM 3.3V High Speed SRAM with Non-Volatile Storage | Austin Semiconductor |
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