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ST93CS67 の電気的特性と機能

ST93CS67のメーカーはSTMicroelectronicsです、この部品の機能は「(ST93CS66 / ST93CS67) 4K 256 x 16 SERIAL MICROWIRE EEPROM」です。


製品の詳細 ( Datasheet PDF )

部品番号 ST93CS67
部品説明 (ST93CS66 / ST93CS67) 4K 256 x 16 SERIAL MICROWIRE EEPROM
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 




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ST93CS67 Datasheet, ST93CS67 PDF,ピン配置, 機能
www.DataSheet4U.com
ST93CS66
ST93CS67
4K (256 x 16) SERIAL MICROWIRE EEPROM
NOT FOR NEW DESIGN
1 MILLION ERASE/WRITE CYCLES, with
40 YEARS DATA RETENTION
SELF-TIMED PROGRAMMING CYCLE with
AUTO-ERASE
READY/BUSY SIGNAL DURING
PROGRAMMING
SINGLE SUPPLY VOLTAGE
– 3V to 5.5V for the ST93CS66
– 2.5V to 5.5V for the ST93CS67
USER DEFINED WRITE PROTECTED AREA
PAGE WRITE MODE (4 WORDS)
SEQUENTIAL READ OPERATION
5ms TYPICAL PROGRAMMING TIME
ST93CS66 and ST93CS67 are replaced by
the M93S66
8
1
PSDIP8 (B)
0.25mm Frame
14
1
SO14 (ML)
150mil Width
Figure 1. Logic Diagram
DESCRIPTION
The ST93CS66 and ST93CS67 are 4K bit Electri-
cally Erasable Programmable Memory (EEPROM)
fabricated with SGS-THOMSON’s High Endurance
Single Polysilicon CMOS technology. The memory
is accessed through a serial input D and output Q.
The 4K bit memory is organized as 256 x 16 bit
words.The memory is accessed by a set of instruc-
tions which include Read, Write, Page Write, Write
All and instructions used to set the memory protec-
tion. A Read instruction loads the address of the
first word to be read into an internal address
pointer.
Table 1. Signal Names
S Chip Select Input
D Serial Data Input
Q Serial Data Output
C Serial Clock
PRE
W
Protect Enable
Write Enable
VCC Supply Voltage
VSS Ground
D
C
S
PRE
W
VCC
ST93CS66
ST93CS67
VSS
Q
AI00906B
June 1997
This is information on a product still in production bu t not recommended for new de signs.
1/16

1 Page





ST93CS67 pdf, ピン配列
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ST93CS66, ST93CS67
AC MEASUREMENT CONDITIONS
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing
Reference Voltages
20ns
0.2VCC to 0.8VCC
0.3VCC to 0.7VCC
Note that Output Hi-Z is defined as the point where data
is no longer driven.
Figure 3. AC Testing Input Output Waveforms
0.8VCC
0.2VCC
0.7VCC
0.3VCC
AI00825
Table 3. Capacitance (1)
(TA = 25 °C, f = 1 MHz )
Symbol
Parameter
CIN Input Capacitance
COUT
Output Capacitance
Note: 1. Sampled only, not 100% tested.
Test Condition
VIN = 0V
VOUT = 0V
Min
Max
Unit
5 pF
5 pF
Table 4. DC Characteristics (TA = 0 to 70°C or –40 to 85°C; VCC = 3V to 5.5V for ST93CS66 and
VCC = 2.5V to 5.5V for ST93CS67)
Symbol
Parameter
Test Condition
Min Max Unit
ILI Input Leakage Current
0V VIN VCC
±2.5 µA
ILO Output Leakage Current
0V VOUT VCC,
Q in Hi-Z
±2.5 µA
ICC Supply Current (TTL Inputs)
S = VIH, f = 1 MHz
3 mA
Supply Current (CMOS Inputs)
S = VIH, f = 1 MHz
2 mA
ICC1 Supply Current (Standby)
S = VSS, C = VSS
50 µA
Input Low Voltage (ST93CS66,67)
4.5V VCC 5.5V
VIL Input Low Voltage (ST93CS66)
3V VCC 5.5V
–0.1
–0.1
0.8
0.2 VCC
V
V
Input Low Voltage (ST93CS67)
2.5V VCC 5.5V
–0.1
0.2 VCC
V
Input High Voltage (ST93CS66,67)
4.5V VCC 5.5V
2
VCC + 1
V
VIH Input High Voltage (ST93CS66)
3V VCC 5.5V
0.8 VCC
VCC + 1
V
Input High Voltage (ST93CS67)
2.5V VCC 5.5V
0.8 VCC
VCC + 1
V
VOL Output Low Voltage
IOL = 2.1mA
IOL = 10 µA
0.4 V
0.2 V
VOH Output High Voltage
IOH = –400µA
IOH = –10µA
2.4
VCC – 0.2
V
V
3/16


3Pages


ST93CS67 電子部品, 半導体
www.DataSheet4U.com
ST93CS66, ST93CS67
POWER-ON DATA PROTECTION
In order to prevent data corruption and inadvertent
write operations during power up, a Power On
Reset (POR) circuit resets all internal programming
circuitry and sets the device in the Write Disable
mode. When VCC reaches its functional value, the
device is properlyreset (in the Write Disable mode)
and is ready to decode and execute an incoming
instruction. A stable VCC must be applied before
any logic signal.
INSTRUCTIONS
The ST93CS66/67 has eleven instructions, as
shown in Table 6. Each instruction is composed of
a 2 bit op-code and an 8 bit address. Each instruc-
tion is preceded by the rising edge of the signal
applied on the Chip Select (S) input (assuming that
the Clock C is low). The data input D is then
sampled upon the following rising edges of the
clock C until a ’1’ is sampled and decoded by the
ST93CS66/67 as a Start bit.
The ST93CS66/67 is fabricated in CMOS technol-
ogy and is therefore able to run from zero Hz (static
input signals) up to the maximum ratings (specified
in Table 5).
Read
The Read instruction (READ) outputs serial data
on the Data Output (Q). When a READ instruction
is received, the instruction and address are de-
coded and the data from the memory is transferred
into an output shiftregister. A dummy ’0’ bit is output
first followed by the 16 bit word with the MSB first.
Table 6. Instruction Set
Instruction
Description
READ Read Data from Memory
WRITE Write Data to Memory
PAWRITE Page Write to Memory
WRALL Write All Memory
WEN
WDS
Write Enable
Write Disable
PRREAD Protect Register Read
PRWRITE Protect Register Write
PRCLEAR Protect Register Clear
PREN Protect Register Enable
PRDS Protect Register Disable
Note: 1. X = don’t care bit.
W
pin (1)
X
’1’
’1’
’1’
’1’
X
X
’1’
’1’
’1’
’1’
PRE
pin
’0’
’0’
’0’
’0’
’0’
’0’
’1’
’1’
’1’
’1’
’1’
Op
Code
10
01
11
00
00
00
10
01
11
00
00
Address (1)
A7-A0
A7-A0
A7-A0
01XX XXXX
11XX XXXX
00XX XXXX
XXXX XXXX
A7-A0
1111 1111
11XX XXXX
0000 0000
Data
Additional
Information
Q15-Q0
D15-D0
Write is executed if
the address is not
inside the
Protected area
D15-D0
Write is executed if
all the addresses
are not inside the
Protected area
Write all data if the
D15-D0 Protect Register is
cleared
Q8-Q0
Data Output =
Protect Register
content + Protect
Flag bit
Data above
specified address
A7-A0 are
protected
Protect Flag is also
cleared (cleared
Flag = 1)
OTP bit is set
permanently
6/16

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共有リンク

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部品番号部品説明メーカ
ST93CS66

(ST93CS66 / ST93CS67) 4K 256 x 16 SERIAL MICROWIRE EEPROM

STMicroelectronics
STMicroelectronics
ST93CS67

(ST93CS66 / ST93CS67) 4K 256 x 16 SERIAL MICROWIRE EEPROM

STMicroelectronics
STMicroelectronics


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