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PDF AK8133 Data sheet ( Hoja de datos )
| Número de pieza | AK8133 | |
| Descripción | Low Suprious Multiclock Generator | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AK8133 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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ASAHI KASEI EMD CORPORATION
www.DataSheet4U.com
Low Suprious
Multiclock Generator for Audio
AK8133
Features
27MHz Crystal Input or External Input
Four Frequency-Selectable Clock Outputs
One 27MHz-Reference Output
Selectable Clock out Frequencies:
- CLK1: 24.576,36.864MHz
- CLK2: 4.096,8.192,11.2896,12.288,16.384
22.5792,24.576,49.152MHz
- CLK3: 8.4672,12.288,16.9344,18.432
24.576,33.8688,36.864,73.728MHz
- CLK4: 16.9344,33.8688MHz
Built-in XO
Low Jitter Performance
- Period Jitter:
30 psec (Typ.) at CLK1-4
Low Current Consumption:
18.0mA (Typ.) at 3.3V
Supply Voltage:
2.85V to 3.6V
Operating Temperature Range:
-40℃ to +85℃
Package:
16-pin SSOP (Lead free)
Description
The AK8133 is a member of AKEMD’s low power
multi clock generator family designed for a high
quality audio cock with high performance C/N.
The AK8133 generates different frequency clocks
from a 27MHz crystal oscillator or external 27MHz
clock input. It provides them to up to four outputs
configured by pin-setting. Both circuitries of XO
and PLL in AK8133 are derived from AKEMD’s
long-term-experienced clock device technology,
and enable clock output to perform low jitter and to
operate with very low current consumption. The
AK8133 is available in a 16-pin SSOP package.
Applications
Personal Video Recorders
Set-Top-Boxes
Multi Media Receivers
Block Diagram
XIN
XOUT
Crystal
Oscillator
S0
S1
S2
S3
VDD
PLL1
PLL1
PLL2
Divide
Logic
and
Output
Control
GND
AK8133 Multi Clock Generator
CLK1
CLK2
CLK3
CLK4
REFOUT
MS0930-E-00
-1-
Mar-08
1 page  
AK8133
www.DataSheet4U.com
Output clock frequency selection
The AK8133 generates a range of low-jitter and high-accuracy clock frequencies with two built-in PLLs and
provides to up to four assigned outputs. A frequency selection at assigned output pin is configured by
pin-setting of S0 (Pin2), S1 (Pin3), S2(Pin4) and S3 (Pin14).
The selectable frequency is shown in Table 2 and Table2.
Selection Pin
S3(Pin14)
L
H
Output Frequency(MHz)
CLK1(Pin 7)
36.864
24.576
Table 1: CLK1 Clock output Frequency
Sampling
Frequency
(kHz)
48.0
44.1
32.0
192.0
88.2
96.0
64.0
16.0/22.05
Selection Pin
S2
(Pin 4)
L
L
L
L
H
H
H
H
S1
(Pin 3)
L
L
H
H
L
L
H
H
S0
(Pin 2)
L
H
L
H
L
H
L
H
Clock Output Frequency (MHz)
CLK2
256fs
(Pin 8)
12.288
11.2896
8.192
49.152
22.5792
24.576
16.384
4.096
CLK3
384fs
(Pin 10)
18.432
16.9344
12.288
73.728
33.8688
36.864
24.576
8.4672
CLK4
(Pin 11)
33.8688
33.8688
33.8688
33.8688
33.8688
33.8688
33.8688
16.9344
Table 2: CLK2-4 Clock output Frequency
MS0930-E-00
-5-
Mar-08
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet AK8133.PDF ] | |
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