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ADV3002 の電気的特性と機能

ADV3002のメーカーはAnalog Devicesです、この部品の機能は「4:1 HDMI/DVI Switch」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADV3002
部品説明 4:1 HDMI/DVI Switch
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADV3002 Datasheet, ADV3002 PDF,ピン配置, 機能
Data Sheet
4:1 HDMI/DVI Switch with Equalization,
DDC/CEC Buffers and EDID Replication
ADV3002
FEATURES
4 inputs, 1 output HDMI/DVI links
±8 kV ESD protection on input pins
HDMI 1.4a receive and transmit compliant
Supports 250 Mbps to 2.25 Gbps data rates and beyond
Supports 25 MHz to 225 MHz pixel clocks and beyond
Fully buffered unidirectional inputs/outputs
Switchable 50 Ω on-chip input terminations with manual
or automatic control on channel switch
Equalized inputs with low added jitter compensate for
more than 20 meters of HDMI cable at 2.25 Gbps
Loss of signal (LOS) detect circuit on TMDS clock
Output disable feature for reduced power dissipation
Bidirectional DDC buffers (SDA and SCL)
EDID replication reduces component count, while enabling
simultaneous access to all HDMI sources
5 V combiner provides power to EDID replicator and CEC
buffer when local system power is off
Bidirectional buffered CEC line with integrated pull-up
resistors (26 kΩ)
Hot plug detect pulse low on channel switch with
programmable pulse width or direct manual control
Standards compatible: HDMI, DVI, HDCP, I2C
80-lead, 14 mm × 14 mm LQFP RoHS-compliant package
APPLICATIONS
Advanced television (HDTV) sets
Projectors
A/V receivers
Set-top boxes
GENERAL DESCRIPTION
The ADV3002 is a complete HDMI™/DVI link switch featuring
equalized transition minimized differential signaling (TMDS)
inputs, ideal for systems with long cable runs. The ADV3002
includes bidirectional buffering for the DDC bus and CEC line,
with integrated pull-up resistors for the CEC line. Additionally,
the ADV3002 includes an EDID replication function that enables
one EDID EEPROM to be shared for all four HDMI ports.
The ADV3002 is provided in a space-saving, 80-lead LQFP
surface-mount, Pb-free plastic package and is specified to
operate over the 0°C to 85°C temperature range.
I2C_SDA
I2C_SCL
I2C_ADDR[1:0]
AVCC
FUNCTIONAL BLOCK DIAGRAM
SEL[1:0] TX_EN
RESETB
SERIAL
PARALLEL
CONFIG
2 INTERFACE
CONTROL
LOGIC
ADV3002
AVCC
AVEE
AVCC
IN_x_CLK+
IN_x_CLK–
IN_x_DATA2+
IN_x_DATA2–
IN_x_DATA1+
IN_x_DATA1–
IN_x_DATA0+
IN_x_DATA0–
+
+
+
+
LOS
4
4
4
4
4
SWITCH
CORE
EQ
4
4
TMDS
+
OUT_CLK+
+
OUT_CLK–
OUT_DATA2+
+
+
OUT_DATA2–
OUT_DATA1+
OUT_DATA1–
OUT_DATA0+
OUT_DATA0–
AVCC
DDC_xxx_A
DDC_xxx_B
DDC_xxx_C
DDC_xxx_D
CEC_IN
P5V_A
P5V_B
P5V_C
P5V_D
HPD_A
HPD_B
HPD_C
HPD_D
2
2
2
2
SWITCH
CORE
3.3V
2
3.3V
DDC/CEC
BIDIRECTIONAL
EDID
REPLICATOR
CONTROL
2
5V
COMBINER
EDID EEPROM INTERFACE
HPD
CONTROL
AVCC
DDC_SCL_COM,
DDC_SDA_COM
CEC_OUT
EDID_ENABLE
EDID_SCL,
EDID_SDA
AMUXVCC
HOT PLUG DETECT
Figure 1.
PRODUCT HIGHLIGHTS
1. Input cable equalizer enables use of long cables at the input.
For a 24 AWG cable, the ADV3002 compensates for more
than 20 meters at data rates of up to 2.25 Gbps.
2. Auxiliary multiplexer isolates and buffers the DDC bus and
the CEC line, increasing total system capacitance limit.
3. EDID replication eliminates the need for multiple EDID
EEPROMs. EDID can be loaded from a single external
EEPROM or from a system microcontroller.
4. 5 V power combiner powers the EDID replicator and CEC
buffer when local system power is off.
5. Integrated hot plug detect pulse low on channel switch
with programmable pulse width or direct manual control.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,nor for anyinfringementsofpatentsor other
rightsof third partiesthat may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.

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ADV3002 pdf, ピン配列
ADV3002
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
TMDS Performance Specifications ............................................ 3
Auxiliary Channel Performance Specifications ....................... 3
Power Supply and Control Logic Specifications ...................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 12
TMDS Input Channels............................................................... 12
TMDS Output Channels ........................................................... 12
REVISION HISTORY
8/12—Rev. A to Rev. B
Changed Data Rate = 3 Gbps to
Data Rate = 2.25 Gbps................................................... Throughout
Changes to Features Section and Product Highlights Section ... 1
Changes to Table 1............................................................................ 3
Changes to specifications statements in Typical Performance
Characteristics Section..................................................................... 8
Changes to Theory of Operation Section.................................... 12
Changes to Cable Lengths and Equalization Section and
PCB Layout Guidelines Section.................................................... 24
Added Unused DDC/CEC Buffers Section................................. 26
Data Sheet
DDC Buffers................................................................................ 13
EDID Replication ....................................................................... 13
5 V Combiner ............................................................................. 15
CEC Buffer .................................................................................. 16
Hot Plug Detect Control ........................................................... 16
Loss of Signal Detect.................................................................. 16
Serial Control Interface ................................................................. 17
Reset ............................................................................................. 17
Write Procedure.......................................................................... 17
Read Procedure........................................................................... 18
Register Map ................................................................................... 19
Applications Information .............................................................. 21
HDMI Multiplexer for Advanced TV...................................... 21
Cable Lengths and Equalization............................................... 24
PCB Layout Guidelines.............................................................. 24
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 27
8/11—Rev. 0 to Rev. A
Changed Data Rate = 2.25 Gbps to
Data Rate = 3 Gbps........................................................ Throughout
Changes to Features Section and Product Highlights Section ....1
Changes to Table 1.............................................................................3
Changes to Figure 4 Caption and Figure 6 Caption .....................8
Added Figure 5 and Figure 7; Renumbered Sequentially ............8
Moved Figure 8 and Figure 10 .........................................................9
Changes to Figure 8 Caption and Figure 10 Caption ...................9
Added Figure 9 and Figure 11 .........................................................9
Changes to Figure 12 and Figure 15 ............................................ 10
Changes to TMDS Input Channels Section and TMDS Output
Channels Section ............................................................................ 12
Changes to Figure 31...................................................................... 16
Changes to Cable Lengths and Equalization Section ................ 24
12/08—Revision 0: Initial Version
Rev. B | Page 2 of 28


3Pages


ADV3002 電子部品, 半導体
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
AVCC to AVEE
P5V_x
AMUXVCC
Internal Power Dissipation
TMDS Single-Ended Input
Voltage
TMDS Differential Input
Voltage
Voltage at TMDS Output
DDC Input Voltage
CEC Input Voltage
I2C Logic Input Voltage
(EDID_SCL, EDID_SDA,
I2C_SCL, I2C_SDA)
Parallel Input Voltage
(I2C_ADDR[1:0],
RESETB)
Parallel Input Voltage
(SEL[1:0], TX_EN)
Storage Temperature Range
Operating Temperature
Range
Junction Temperature
ESD Protection (HBM) on
HDMI Input Pins
ESD Protection (HBM) on
All Other Pins
Rating
3.7 V
5.8 V
AVCC − 0.3 V < AMUXVCC < 5.8 V
1.2 W
AVCC − 1.4 V < VIN < AVCC + 0.3 V
2.0 V
VOUT < 3.7 V
AVEE − 0.3 V < VIN < AMUXVCC + 0.3 V
AVEE − 0.3 V < VIN < 4.0 V
AVEE − 0.3 V < VIN < 4.0 V
AVEE − 0.3 V < VIN < AMUXVCC + 0.3 V
AVEE − 0.3V < VIN < AVCC + 0.3 V
−65°C to +125°C
0°C to +85°C
150°C
±8 kV
±2.5 kV
ADV3002
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions; a device soldered
in a 4-layer JEDEC circuit board for surface-mount packages.
θJC is specified for the exposed pad soldered to the circuit board
with no airflow.
Table 5. Thermal Resistance
Package Type
θJA θJC Unit
80-Lead LQFP (ST-80-2)
51.3
15.3
°C/W
ESD CAUTION
Rev. B | Page 5 of 28

6 Page



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共有リンク

Link :


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ADV3000

3:1 HDMI/DVI Switch

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ADV3002

4:1 HDMI/DVI Switch

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ADV3003

HDMI/DVI TMDS Equalizer

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