DataSheet.jp

3D7110 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 3D7110
部品説明 MONOLITHIC 10-TAP FIXED DELAY LINE
メーカ Data Delay Devices
ロゴ Data Delay Devices ロゴ 



Total 5 pages
		

No Preview Available !

3D7110 Datasheet, 3D7110 PDF,ピン配置, 機能
MONOLITHICwww.DataSheet4U.com 10-TAP
FIXED DELAY LINE
(SERIES 3D7110)
3D7110
FEATURES
PACKAGES
All-silicon, low-power CMOS technology
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
IN 1
N/C 2
O2 3
14 VDD
13 O1
12 O3
IN 1 14 VDD
N/C 2 13 O1
O2 3 12 O3
O4 4 11 O5
O6 5 10 O7
O8 6 9 O9
Low ground bounce noise
O4 4 11 O5
GND 7 8 O10
Leading- and trailing-edge accuracy
Delay range: .75 through 80ns
O6 5
O8 6
10 O7
9 O9
3D7110D SOIC
(150 Mil)
Delay tolerance: 5% or 1ns
Temperature stability: ±3% typical (0C-70C)
Vdd stability: ±1% typical (4.75V-5.25V)
Minimum input pulse width: 15% of total delay
GND 7
8 O10
3D7110 DIP
3D7110G Gull-Wing
IN 1
N/C 2
N/C 3
O2 4
16 VDD
15 N/C
14 O1
13 O3
14-pin Gull-Wing and 16-pin SOIC
available as drop-in replacements
for hybrid delay lines
For mechanical dimensions, click here.
For package marking details, click here.
O4
O6
O8
GND
5
6
7
8
12 O5
11 O7
10 O9
9 O10
3D7110S SOL
(300 Mil)
FUNCTIONAL DESCRIPTION
The 3D7110 10-Tap Delay Line product family consists of fixed-delay
CMOS integrated circuits. Each package contains a single delay line,
tapped and buffered at 10 points spaced uniformly in time. Tap-to-tap
(incremental) delay values can range from 0.75ns through 8.0ns. The
input is reproduced at the outputs without inversion, shifted in time as
per the user-specified dash number. The 3D7110 is TTL- and CMOS-
compatible, capable of driving ten 74LS-type loads, and features both
rising- and falling-edge accuracy.
The all-CMOS 3D7110 integrated circuit has been designed as a
reliable, economic alternative to hybrid TTL fixed delay lines. It is offered
in a standard 14-pin auto-insertable DIP and space saving surface
mount 14- and 16-pin SOIC packages.
PIN DESCRIPTIONS
IN
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
VDD
GND
Delay Line Input
Tap 1 Output (10%)
Tap 2 Output (20%)
Tap 3 Output (30%)
Tap 4 Output (40%)
Tap 5 Output (50%)
Tap 6 Output (60%)
Tap 7 Output (70%)
Tap 8 Output (80%)
Tap 9 Output (90%)
Tap 10 Output (100%)
+5 Volts
Ground
Doc #96005
12/2/96
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1

1 Page





ページ 合計 : 5 ページ
PDF
ダウンロード
[ 3D7110.PDF ]

共有リンク

Link :

おすすめデータシート

部品番号部品説明メーカ
3D7110

MONOLITHIC 10-TAP FIXED DELAY LINE

Data Delay Devices
Data Delay Devices

www.DataSheet.jp    |   2019   |  メール    |   最新    |   Sitemap