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ISL6323A の電気的特性と機能

ISL6323AのメーカーはIntersil Corporationです、この部品の機能は「Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane And PVI Uniplane Processors」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL6323A
部品説明 Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane And PVI Uniplane Processors
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL6323A Datasheet, ISL6323A PDF,ピン配置, 機能
www.DataSheet4U.com
®
Data Sheet
March 23, 2009
ISL6323A
FN6878.0
Monolithic Dual PWM Hybrid Controller
Powering AMD SVI Split-Plane and PVI
Uniplane Processors
The ISL6323A dual PWM controller delivers high efficiency
and tight regulation from two synchronous buck DC/DC
converters. The ISL6323A supports hybrid power control of
AMD processors which operate from either a 6-bit parallel
VID interface (PVI) or a serial VID interface (SVI). The dual
output ISL6323A features a multi-phase controller to support
uniplane VDD core voltage and a single phase controller to
power the Northbridge (VDDNB) in SVI mode. Only the
multi-phase controller is active in PVI mode to support
uniplane VDD only processors.
A precision uniplane core voltage regulation system is
provided by a two-to-four-phase PWM voltage regulator (VR)
controller. The integration of two power MOSFET drivers,
adding flexibility in layout, reduce the number of external
components in the multi-phase section. A single phase PWM
controller with integrated driver provides a second precision
voltage regulation system for the North Bridge portion of the
processor. This monolithic, dual controller with integrated
driver solution provides a cost and space saving power
management solution.
For applications which benefit from load line programming to
reduce bulk output capacitors, the ISL6323A features output
voltage droop. The multi-phase portion also includes
advanced control loop features for optimal transient
response to load apply and removal. One of these features
is highly accurate, fully differential, continuous DCR current
sensing for load line programming and channel current
balance. Dual edge modulation is another unique feature,
allowing for quicker initial response to high di/dt load
transients.
The ISL6323A supports Power Savings Mode by dropping
the number of phases to one when the PSI_L bit is set.
Ordering Information
PART NUMBER
PART
(Note)
MARKING
TEMP.
(°C)
PACKAGE PKG.
(Pb-free) DWG. #
ISL6323ACRZ* ISL6323A CRZ 0 to +70 48 Ld 7x7 QFN L48.7x7
ISL6323AIRZ* ISL6323A IRZ -40 to +85 48 Ld 7x7 QFN L48.7x7
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel
specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• Processor Core Voltage Via Integrated Multi-Phase
Power Conversion
• Configuration Flexibility
- 2-Phase Operation with Internal Drivers
- 3- or 4-Phase Operation with External PWM Drivers
• PSI_L Support with Phase Shedding for Improved
Efficiency at Light Load
• Serial VID Interface Inputs
- Two Wire, Clock and Data, Bus
- Conforms to AMD SVI Specifications
• Parallel VID Interface Inputs
- 6-bit VID input
- 0.775V to 1.55V in 25mV Steps
- 0.375V to 0.7625V in 12.5mV Steps
• Precision Core Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.6% System Accuracy Over-Temperature
- Adjustable Reference-Voltage Offset
• Optimal Processor Core Voltage Transient Response
- Adaptive Phase Alignment (APA)
- Active Pulse Positioning Modulation
• Fully Differential, Continuous DCR Current Sensing
- Accurate Load Line Programming
- Precision Channel Current Balancing
• Variable Gate Drive Bias: 5V to 12V
• Overcurrent Protection
• Multi-tiered Overvoltage Protection
• Selectable Switching Frequency up to 1MHz
• Simultaneous Digital Soft-Start of Both Outputs
• Processor NorthBridge Voltage Via Single Phase
Power Conversion
• Precision Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.6% System Accuracy Over Temperature
• Serial VID Interface Inputs
- Two Wire, Clock and Data, Bus
- Conforms to AMD SVI Specifications
• Overcurrent Protection
• Continuous DCR Current Sensing
• Variable Gate Drive Bias: 5V to 12V
• Simultaneous Digital Soft-Start of Both Outputs
• Selectable Switching Frequency up to 1MHz
• Pb-Free Plus Anneal Available (RoHS Compliant)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL6323A pdf, ピン配列
ISL6323A
www.CDaotanShtereot4llUe.cromBlock Diagram
RGND_NB
FB_NB
COMP_NB
ISEN_NB+
ISEN_NB-
NB_REF
CURRENT
SENSE
UV
LOGIC
OV
LOGIC
E/A
RAMP
MOSFET
DRIVER
VDDPWRGD
APA
COMP
OFS
FB
DVC
RGND
PWROK
VID0/VFIXEN
VID1/SEL
VID2/SVD
VID3/SVC
VID4
VID5
VSEN
RSET
ISEN1+
ISEN1-
ISEN2+
ISEN2-
ISEN3+
ISEN3-
ISEN4+
ISEN4-
APA
OFFSET
2X
E/A
SVI
SLAVE
BUS
AND
PVI
DAC
NB
FAULT
LOGIC
SOFT-START
AND
FAULT LOGIC
EN_12V
ENABLE
LOGIC
POWER-ON
RESET
LOAD APPLY
TRANSIENT
ENHANCEMENT
CLOCK AND
TRIANGLE WAVE
GENERATOR
DROOP
CONTROL
MOSFET
DRIVER
NB_REF
OV
LOGIC
UV
LOGIC
RESISTOR
MATCHING
CH1
CURRENT
SENSE
OC
I_TRIP I_AVG
PWM1
PWM2
PWM3
PWM4
CH2
CURRENT
SENSE
CH3
CURRENT
SENSE
ISEN3-
CH4
CURRENT
SENSE
ISEN4-
CHANNEL
CURRENT
BALANCE
I_AVG
1
N
GND
MOSFET
DRIVER
PH3/PH4
POR
CHANNEL
DETECT
EN_12V
ISEN3-
ISEN4-
PWM3
SIGNAL
LOGIC
PWM4
SIGNAL
LOGIC
3
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
PVCC_NB
EN
VCC
PVCC1_2
BOOT1
UGATE1
PHASE1
LGATE1
FS
BOOT2
UGATE2
PHASE2
LGATE2
PWM3
PWM4
FN6878.0


3Pages


ISL6323A 電子部品, 半導体
ISL6323A
www.ADabtasSohleuette4UM.caomximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.2V
Supply Voltage (PVCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V
Absolute Boot Voltage (VBOOT). . . . . . . . GND - 0.3V to GND + 36V
Phase Voltage (VPHASE) . . . . . . . . GND - 0.3V to 15V (PVCC = 12)
GND - 8V (<400ns, 20µJ) to 24V (<200ns, VBOOT-PHASE = 12V)
Upper Gate Voltage (VUGATE). . . . VPHASE - 0.3V to VBOOT + 0.3V
VPHASE - 3.5V (<100ns Pulse Width, 2µJ) to VBOOT + 0.3V
Lower Gate Voltage (VLGATE) . . . . . . . GND - 0.3V to PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to PVCC+ 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
Thermal Information
Thermal Resistance
θJA (°C/W) θJC (°C/W)
QFN Package (Notes 1, 2) . . . . . . . . . .
27
2
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+5V ±5%
PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V ±5%
Ambient Temperature
ISL6323ACRZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
ISL6323AIRZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
3. Limits established by characterization and are not production tested.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Specified. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are
not production tested.
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
BIAS SUPPLIES
Input Bias Supply Current
Gate Drive Bias Current - PVCC1_2 Pin
Gate Drive Bias Current - PVCC_NB Pin
VCC POR (Power-On Reset) Threshold
IVCC; EN = high
IPVCC1_2; EN = high
IPVCC_NB; EN = high
VCC Rising
15
1
0.3
4.20
22
1.8
0.9
4.35
25
3
2
4.50
mA
mA
mA
V
VCC Falling
3.70 3.85 4.05
V
PVCC POR (Power-On Reset) Threshold
PVCC Rising
4.20 4.35 4.50
V
PVCC Falling
3.70 3.85 4.05
V
PWM MODULATOR
Oscillator Frequency Accuracy, FSW
RT = 100kΩ (±0.1%) to Ground,
(Droop Enabled)
225 250 265 kHz
RT = 100kΩ (±0.1%) to VCC,
(Droop Disabled), 0°C to +70°C
245 275 310 kHz
RT = 100kΩ (±0.1%) to VCC,
(Droop Disabled), -40°C to +85°C
240 275 310 kHz
Typical Adjustment Range of Switching Frequency (Note 3)
0.08 1.0 MHz
Oscillator Ramp Amplitude, VP-P
Maximum Duty Cycle
(Note 3)
(Note 3)
1.50 V
99.5 %
CONTROL THRESHOLDS
EN Rising Threshold
0.80 0.88 0.92
V
EN Hysteresis
70 130 190 mV
PWROK Input HIGH Threshold
1.1 V
PWROK Input LOW Threshold
0.95 V
6 FN6878.0

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
ISL6323

Hybrid SVI/PVI

Intersil Corporation
Intersil Corporation
ISL6323A

Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane And PVI Uniplane Processors

Intersil Corporation
Intersil Corporation
ISL6323B

Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane And PVI Uniplane Processors

Intersil Corporation
Intersil Corporation


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