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PDF ISL22313 Data sheet ( Hoja de datos )
| Número de pieza | ISL22313 | |
| Descripción | Single Digitally Controlled Potentiometer | |
| Fabricantes | Intersil Corporation | |
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ISL22313
® Single Digitally Controlled Potentiometer (XDCP™)
Data Sheet
July 17, 2007
FN6421.0
Low Noise, Low Power, I2C® Bus, 256 Taps
The ISL22313 integrates a single digitally controlled
potentiometer (DCP), control logic and non-volatile memory
on a monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. The potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR control the position of the
wiper. At power up the device recalls the contents of the
DCP’s IVR to the WR.
The ISL22313 also has 14 general purpose non-volatile
registers that can be used as storage of lookup table for
multiple wiper position or any other valuable information.
The ISL22313 features a dual supply, that is beneficial for
applications requiring a bipolar range for DCP terminals
between V- and VCC.
The DCP can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Pinout
ISL22313
(10 LD MSOP)
TOP VIEW
SCL
SDA
A1
A0
V-
1O
2
3
4
5
10 VCC
9 RH
8 RW
7 RL
6 GND
Features
• 256 resistor taps
• I2C serial interface
- Two address pins, up to four devices per bus
• Non-volatile EEPROM storage of wiper position
• 14 General Purpose non-volatile registers
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T≤+55°C
• Wiper resistance: 70Ω typical @ 1mA
• Standby current <2.5µA max
• Shutdown current <2.5µA max
• Dual power supply
- VCC = 2.25V to 5.5V
- V- = -2.25V to -5.5V
• DCP terminal voltage from V- to VCC
• 10kΩ, 50kΩ or 100kΩ total resistance
• Extended industrial temperature range: -40 to +125°C
• 10 Lead MSOP
• Pb-free plus anneal product (RoHS compliant)
Ordering Information
PART
NUMBER
(Notes 1, 2)
PART
MARKING
RESISTANCE
OPTION
(kΩ)
TEMP.
RANGE
(°C)
PACKAGE
(Pb-Free)
PKG. DWG. #
ISL22313TFU10Z
313TZ
100
-40 to +125
10 Ld MSOP
M10.118
ISL22313UFU10Z
313UZ
50
-40 to +125
10 Ld MSOP
M10.118
ISL22313WFU10Z
313WZ
10
-40 to +125
10 Ld MSOP
M10.118
NOTES:
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. Add “-TK” suffix for 1,000 Tape and Reel option
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL22313
www.ODaptaeSrahetient4gU.Scopmecifications Over the recommended operating conditions unless otherwise specified. Limits are established by
characterization. (Continued)
SYMBOL
PARAMETER
ISB VCC Current (standby)
IV-SB V- Current (standby)
ISD VCC Current (shutdown)
IV-SB V- Current (standby)
TEST CONDITIONS
VCC = +5.5V, V- = -5.5V @ +85°C, I2C
interface in standby state
VCC = +5.5V, V- = -5.5V @ +125°C, I2C
interface in standby state
VCC = +2.25V, V- = -2.25V @ +85°C, I2C
interface in standby state
VCC = +2.25V, V- = -2.25V @ +125°C, I2C
interface in standby state
V- = -5.5V, VCC = +5.5V @ +85°C, I2C
interface in standby state
V- = -5.5V, VCC = +5.5V @ +125°C, I2C
interface in standby state
V- = -2.25V, VCC = +2.25V @ +85°C, I2C
interface in standby state
V- = -2.25V, VCC = +2.25V @ +125°C, I2C
interface in standby state
VCC = +5.5V, V- = -5.5V @ +85°C, I2C
interface in standby state
VCC = +5.5V, V- = -5.5V @ +125°C, I2C
interface in standby state
VCC = +2.25V, V- = -2.25V @ +85°C, I2C
interface in standby state
VCC = +2.25V, V- = -2.25V @ +125°C, I2C
interface in standby state
V- = -5.5V, VCC = +5.5V @ +85°C, I2C
interface in standby state
V- = -5.5V, VCC = +5.5V @ +125°C, I2C
interface in standby state
V- = -2.25V, VCC = +2.25V @ +85°C, I2C
interface in standby state
V- = -2.25V, VCC = +2.25V @ +125°C, I2C
interface in standby state
MIN TYP MAX
(Note 18) (Note 4) (Note 18)
0.2 1.5
1 2.5
0.1 1
0.5 2
-2.5 -0.7
-4 -3
-1.5 -0.3
-3 -1
0.2 1.5
1 2.5
0.1 1
0.5 2
-2.5 -0.7
-4 -3
-1.5 -0.3
-3 -1
ILkgDig
Leakage current, at pins A0, A1, SDA, Voltage at pin from GND to VCC
and SCL
-1
1
tDCP
DCP wiper response time
(Note 16)
SCL falling edge of last bit of DCP data byte
to wiper new position
1.5
tShdnRec DCP recall time from shutdown mode SCL falling edge of last bit of ACR data byte
(Note 16)
to wiper stored position and RH connection
1.5
Vpor Power-on recall voltage
VCC Ramp VCC ramp rate
tD Power-up delay
Minimum VCC at which memory recall occurs
VCC above Vpor, to DCP Initial Value
Register recall completed, and I2C Interface
in standby state
1.9
0.2
2.1
5
EEPROM SPECIFICATION
EEPROM Endurance
1,000,000
EEPROM Retention
Temperature T ≤ +55°C
50
tWC Non-volatile Write cycle time
(Note 17)
12 20
UNIT
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µs
µs
V
V/ms
ms
Cycles
Years
ms
5 FN6421.0
July 17, 2007
5 Page 
ISL22313
www.DDaetvaiScheeAetd4Ud.rceosms (A1, A0)
The address inputs are used to set the least significant 2 bits
of the 7-bit I2C interface slave address. A match in the slave
address serial data stream must match with the Address
input pins in order to initiate communication with the
ISL22313. A maximum of four ISL22313 devices may
occupy the I2C serial bus (see Table 3).
Principles of Operation
The ISL22313 is an integrated circuit incorporating one DCP
with its associated registers, non-volatile memory and an I2C
serial interface providing direct communication between a
host and the potentiometer and memory. The resistor array
is comprised of individual resistors connected in series. At
either end of the array and between each resistor is an
electronic switch that transfers the potential at that point to
the wiper.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions.
When the device is powered down, the last value stored in
IVR will be maintained in the non-volatile memory. When
power is restored, the contents of the IVR are recalled and
loaded into the WR to set the wiper to the initial value.
DCP Description
The DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of each
DCP are equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL pins). The RW pin of the DCP is
connected to intermediate nodes, and is equivalent to the
wiper terminal of a mechanical potentiometer. The position
of the wiper terminal within the DCP is controlled by an 8-bit
volatile Wiper Register (WR). When the WR of a DCP
contains all zeroes (WR[7:0]= 00h), its wiper terminal (RW)
is closest to its “Low” terminal (RL). When the WR register of
a DCP contains all ones (WR[7:0]= FFh), its wiper terminal
(RW) is closest to its “High” terminal (RH). As the value of
the WR increases from all zeroes (0) to all ones (255
decimal), the wiper moves monotonically from the position
closest to RL to the position closest to RH. At the same time,
the resistance between RW and RL increases monotonically,
while the resistance between RH and RW decreases
monotonically.
While the ISL22313 is being powered up, the WR is reset to
80h (128 decimal), which locates RW roughly at the center
between RL and RH. After the power supply voltage
becomes large enough for reliable non-volatile memory
reading, the WR will be reloaded with the value stored in a
non-volatile Initial Value Register (IVR).
The WR and IVR can be read or written to directly using the
I2C serial interface as described in the following sections.
Memory Description
The ISL22313 contains one non-volatile 8-bit Initial Value
Register (IVR), fourteen General Purpose non-volatile 8-bit
registers and two volatile 8-bit registers: Wiper Register (WR)
and Access Control Register (ACR). Memory map of ISL22313
is in Table 1. The non-volatile register (IVR) at address 0,
contains initial wiper position and volatile register (WR) contains
current wiper position.
TABLE 1. MEMORY MAP
ADDRESS
(hex)
NON-VOLATILE
VOLATILE
10 N/A
ACR
F Reserved
E General Purpose
N/A
D General Purpose
N/A
C General Purpose
N/A
B General Purpose
N/A
A General Purpose
N/A
9 General Purpose
N/A
8 General Purpose
N/A
7 General Purpose
N/A
6 General Purpose
N/A
5 General Purpose
N/A
4 General Purpose
N/A
3 General Purpose
N/A
2 General Purpose
N/A
1 General Purpose
N/A
0 IVR
WR
The non-volatile IVR and volatile WR registers are
accessible with the same address.
The Access Control Register (ACR) contains information
and control bits described below in Table 2.
The VOL bit (ACR[7]) determines whether the access to
wiper registers WR or initial value registers IVR.
TABLE 2. ACCESS CONTROL REGISTER (ACR)
BIT # 7 6 5 4 3 2 1 0
NAME VOL SHDN WIP 0 0 0 0 0
If VOL bit is 0, the non-volatile IVR register is accessible. If
VOL bit is 1, only the volatile WR is accessible. Note: Value
is written to IVR register also is written to the WR. The
default value of this bit is 0.
The SHDN bit (ACR[6]) disables or enables Shutdown mode.
When this bit is 0, i.e. DCP is forced to end-to-end open
circuit and RW is shorted to RL as shown on Figure 15.
Default value of the SHDN bit is 1.
11 FN6421.0
July 17, 2007
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ISL22313.PDF ] | |
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