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ISL9217 の電気的特性と機能

ISL9217のメーカーはIntersil Corporationです、この部品の機能は「(ISL9216 / ISL9217) 8 to 12 Cell Li-Ion Battery Overcurrent Protection and Analog Front End Chip Set」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL9217
部品説明 (ISL9216 / ISL9217) 8 to 12 Cell Li-Ion Battery Overcurrent Protection and Analog Front End Chip Set
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL9217 Datasheet, ISL9217 PDF,ピン配置, 機能
www.DataSheet4U.com
®
Data Sheet
ISL9216, ISL9217
November 2, 2007
FN6488.1
8 to 12 Cell Li-Ion Battery Overcurrent
Protection and Analog Front End Chip Set
The ISL9216 and ISL9217 chipset provides overcurrent
protection and voltage monitoring for multi-cell li-ion battery
packs consisting of 8 to 12 cells. When used together, these
devices provide integrated overcurrent protection circuitry,
short circuit protection, an internal voltage regulator, internal
cell balancing switches, cell voltage level shifters, and drive
circuitry for external FET devices that control pack charge
and discharge. Level shifting of the analog output voltage
from the upper cells and communication between the chips
is handled automatically.
Overcurrent and short circuit thresholds reside in internal
RAM registers and are selected independently via software
using an I2C serial interface. Detection and time-out delays
can be individually varied using internal registers.
Using an internal analog multiplexer, the device provides
monitoring of cell voltage by a separate microcontroller with
A/D converter. Software on this microcontroller implements
all battery control functionality, except for overcurrent and
short circuit shutdown.
Applications
• Power Tools
• Battery Backup Systems
• E-bikes
• Portable Test Equipment
• Medical Systems
• Hybrid Vehicle
• Military Electronics
Ordering Information
PART NUMBER
(Note)
PART
MARKING
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL9216IRZ*
ISL9216 IRZ 32 Ld 5x5 QFN L32.5x5B
ISL9217IRZ*
921 7IRZ
24 Ld 4x4 QFN L24.4x4D
*Add “-T” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Software selectable overcurrent protection levels and
variable protect detection/release times
- 4 Discharge overcurrent thresholds
- 4 Short circuit thresholds
- 4 Charge overcurrent thresholds
- 8 Overcurrent delay times (Charge)
- 8 Overcurrent delay times (Discharge)
- 2 Short circuit delay times (Discharge)
• Automatic FET turn-off and cell balance disable on
reaching external (battery) or internal (IC) temperature
limit
• Automatic over-ride of cell balance on reaching internal
(IC) temperature limit
• Fast short circuit pack shutdown
• Can use current sense resistor, FET rDS(ON), or Sense
FET for overcurrent detection
• Four battery backed software controlled flags
• Allows three different FET controls:
- Back-to-back N-Channel FETs for charge and discharge
control
- Single N-Channel FET for discharge control
- N-Channel FET for discharge, with separate, optional
(smaller) back-to-back FET for charge
• Chips cascade for packs of 8 to 12 cells
• Integrated charge/discharge FET drive circuitry with
200µA (typ) turn on current and 150mA (typ) discharge
FET turn off current
• 10% accurate 3.3V voltage regulator (35mA out with
external NPN transistor having current gain of 70)
• Cell voltage monitor accurate to within 25mV
• Monitored cell voltage output stable in 100µs
• Internal cell balancing FETs handle up to 200mA of
balancing current for each cell (with the number of cells
being balanced limited by the maximum power dissipation
of 400mW)
• Simple I2C host interface
• Sleep operation with programmable negative edge or
positive edge wake-up
• <10µA sleep mode
• Pb-free (RoHS compliant)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL9217 pdf, ピン配列
www.FDautanScheteiot4Un.acolmDiagram
ISL9216, ISL9217
VC7/VCC
CB7
VCELL6
CB6
VCELL5
CB5
VCELL4
CB4
VCELL3
CB3
VCELL2
CB2
VCELL1
CB1
CELL
VOLTAGES
MUX
7
LEVEL
SHIFTERS/
CELL
BALANCE
CIRCUITS
POWER
CONTROL
BACKUP
SUPPLY
VSS
AO WKUP
REGISTERS
I2C I/F
SCL SDAO SDAI
ISL9217
3.3VDC
REGULATOR
INTERNAL
TEMPERATURE
SENSOR/
COMPARATOR
OSC
CONTROL
LOGIC
RGC
RGO
WKUPR
SCLHV SDAIHV SDAOHV HVI2C
VC7/VCC
VCELL6
VCELL5
CB5
VCELL4
CB4
VCELL3
CB3
VCELL2
CB2
VCELL1
CB1
LEVEL/SHIFTERS
CELL
VOLTAGES
7
LEVEL
SHIFTERS/
CELL
BALANCE
CIRCUITS
OVERCURRENT
PROTECTION
CIRCUITS
(THRESHOLD
DETECT AND
TIMING)
MUX
I2C I/F
2
REGISTERS
CONTROL
LOGIC
BACKUP
SUPPLY
VSS
FET CONTROL
CIRCUITRY
OSC
AO
ISL9216
SCL
SDA
POWER
CONTROL
WKUP
3.3VDC
REGULATOR
TEMPERATURE
SENSOR,
INT/EXT
COMPARATOR,
EXT TEMP
RGC
RGO
TEMPI TEMP3V
3 FN6488.1
November 2, 2007


3Pages


ISL9217 電子部品, 半導体
ISL9216, ISL9217
www.ADabtasSohleuette4UM.caomximum Ratings
Power Supply Voltage, VCC . . . . . . . . . .VSS - 0.5V to VSS + 36.0V
Cell Voltage, VCELL
VCELLN to (VCELLN-1), VCELL1-VSS . . . . . . . . . . . . -0.5V to 5V
Terminal Voltage, VTERM1
(SCL, SDA, CSENSE, DSENSE, TEMPI, RGO, AO,
TEMP3V, SDAI, SDAO) . . . . . . . . . . . . VSS - 0.5 to VRGO + 0.5V
Terminal Voltage
VTERM2 (CFET, VMON) . . . . . . . . . . . . . . . . . VSS - 22.0V to VCC
VTERM3 (WKUP) . . . . . . . . . . . . . . VSS - 0.5V to VCC(VCC <27V)
VTERM4 (RGC). . . . . . . . . . . . . . . . . . . . . . . . . . VSS - 0.5V to 5V
VTERM5, (SDAOHV, SDAIHV, SCLHV)
. . . . . . . . . . . . . . . . . . . . . . . . VCELL5 - 0.5V to VHVI2C + 0.5V
VTERM6, (all other pins) . . . . . . . . . . . . VSS - 0.5V to VCC + 0.5V
Thermal Information
Thermal Resistance (Typical, Notes 1, 2) θJA (°C/W) θJC (°C/W)
32 Ld QFN . . . . . . . . . . . . . . . . . . . . . .
31
2
24 Ld QFN . . . . . . . . . . . . . . . . . . . . . .
32
2
Continuous Package Power Dissipation . . . . . . . . . . . . . . . .400mW
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to +125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Voltage
VCC pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.2V to 30.1V
VCELL1-VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3V to 4.3V
VCELLN-(VCELLN-1) . . . . . . . . . . . . . . . . . . . . . . . . 2.2V to 4.3V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. θJC, “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Operating Specifications All Specifications Apply to Both the ISL9216 and ISL9217 Separately Over the Recommended Operating
Conditions, Unless Otherwise Specified.
DESCRIPTION
SYMBOL
TEST CONDITIONS
MIN TYP
MAX
UNIT
Operating Voltage
Power-up Condition 1
Power-up Condition 2 Threshold
Power-up Condition 2 Hysteresis
3.3V Regulated Voltage
3.3VDC Voltage Regulator Control
Current Limit
VCC
VPORVCC VCC voltage (Note 3)
VPOR123 VCELL1 - VSS and VCELL2 - VCELL1 and
VCELL3 - VCELL2 (rising) (Note 3)
VPORhys VCELL1 - VSS and VCELL2 - VCELL1 and
VCELL3 - VCELL2 (falling) (Note 3)
VRGO 0μA < IRGC < 350μA
IRGC (Control current at output of RGC.
Recommend NPN with gain of 70+)
9.2
1.1
3.0
0.35
4
1.7
70
3.3
0.50
31 V
9.2 V
2.3 V
mV
3.6 V
mA
VCC Supply Current
RGO Supply Current
VCC Supply Current
RGO Supply Current
IVCC1
IRGO1
IVCC2
IRGO2
Power-up defaults, WKUP pin = 0V.
LDMONEN bit = 1, VMON floating, CFET = 1,
DFET = 1, WKPOL bit = 1, VWKUP = 10V,
[AO3:AO0] bits = 06H.
400 510 µA
300 410 µA
400 700 µA
450 650 µA
VCC Supply Current
RGO Supply Current
IVCC3 Default register settings, except SLEEP
IRGO3 bit = 1. WKUP pin = VCELL1
VCELL Input Current - VCELL1
IVCELL1 AO3:AO0 = 0000H
VCELL Input Current - VCELL5
IVCELL1 AO3:AO0 = 0000H (ISL9216 Only)
VCELL Input Current - VCELLN
IVCELLN AO3:AO0 = 0000H
OVERCURRENT/SHORT CIRCUIT PROTECTION SPECIFICATIONS (ISL9216 only)
10 µA
1 µA
14 µA
20 µA
10 µA
Overcurrent Detection Threshold
(Discharge) Voltage Relative to DSREF
(Default in Boldface)
VOCD
VOCD = 0.10V (OCDV1, OCDV0 = 0, 0)
VOCD = 0.12V (OCDV1, OCDV0 = 0, 1)
VOCD = 0.14V (OCDV1, OCDV0 = 1, 0)
VOCD = 0.16V (OCDV1, OCDV0 = 1, 1)
0.08
0.10
0.12
0.14
0.10
0.12
0.14
0.16
0.12 V
0.14 V
0.16 V
0.18 V
6 FN6488.1
November 2, 2007

6 Page



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