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PDF HD74LV2GT34A Data sheet ( Hoja de datos )

Número de pieza HD74LV2GT34A
Descripción Triple Noninverters / CMOS Logic Level Shifter
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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HD74LV2GT34A
Triple Noninverters / CMOS Logic Level Shifter
REJ03D0143–0200Z
(Previous ADE-205-668A (Z))
Rev.2.00
Oct.17.2003
Description
The HD74LV2GT34A has triple noninverters in an 8 pin package. The input protection circuitry on this
device allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator
from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while
operating at the high-voltage power supply. Low voltage and high-speed operation is suitable for the
battery powered products (e.g., notebook computers), and the low power consumption extends the battery
life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
Logic-level translate function
3.0 V CMOS logic 5.0 V CMOS logic (@VCC = 5.0 V)
1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@VCC = 3.3 V)
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
Part Name
Package Type
HD74LV2GT34AUSE SSOP-8 pin
Package Code
TTP-8DBV
Package
Abbreviation
US
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Rev.2.00, Oct.17.2003, page 1 of 1

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HD74LV2GT34A pdf
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HD74LV2GT34A
Operating Characteristics
CL = 50 pF
Item
Power dissipation
capacitance
Symbol
CPD
Ta = 25°C
VCC (V) Min
Typ
5.0 —
10.0
Max Unit
— pF
Test Conditions
f = 10 MHz
Test Circuit
VCC
Pulse
generator
Input
50
Output
CL
Note: CL includes probe and jig capacitance.
Rev.2.00, Oct.17.2003, page 5 of 7

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