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ISL3035E の電気的特性と機能

ISL3035EのメーカーはIntersil Corporationです、この部品の機能は「(ISL3034E - ISL3036E) Auto-direction Sensing Logic Level Translators」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL3035E
部品説明 (ISL3034E - ISL3036E) Auto-direction Sensing Logic Level Translators
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL3035E Datasheet, ISL3035E PDF,ピン配置, 機能
www.DataSheet4U.com
®
Data Sheet
ISL3034E, ISL3035E, ISL3036E
March 31, 2009
FN6492.0
4-Channel And 6-Channel High Speed,
Auto-direction Sensing Logic Level
Translators
The ISL3034E, ISL3035E, ISL3036E 4- and 6-channel
bi-directional, auto-direction sensing, level translators
provide the required level shifting in multi-voltage systems at
data transfer rates up to 100Mbps. The auto-direction
sensing feature makes the ISL3034E, ISL3035E, ISL3036E
ideally suited for memory-card level translation (or for
generic four to six channel level translation) especially if
bit-by-bit direction control is desired. The VCC and VL supply
voltages set the logic levels on either side of the device.
Logic signals present on the IC’s VL side appear as higher
voltage logic signals on the IC’s VCC side and vice versa.
The ISL3035E features a CLK_RET output that returns the
same clock signal applied to the CLK_VL input, but with
timing that mimics the data returning from the I/OVCC inputs.
The ISL3034E, ISL3035E, ISL3036E operate at full speed
with external input drivers that source as little as 4mA output
current. Each I/O channel is pulled up to VCC or VL by an
internal 30µA current source, allowing the ISL3034E,
ISL3035E, ISL3036E to be driven by either push-pull or
open-drain drivers.
The ISL3034E and ISL3036E include an enable (EN) input
that when driven low places the IC into a low-power
shutdown mode, with all I/O lines tri-stated. All versions
feature an automatic shutdown mode, that places the part in
the same shutdown state when VCC is less than VL. The
states of I/OVCC and I/OVL during shutdown are chosen by
selecting the appropriate product (see Table 1).
The ISL3034E, ISL3035E, ISL3036E operate with VCC
voltages from +2.2V to +3.6V and VL voltages from +1.35V
to +3.2V, making them ideal for data transfer between
low-voltage microcontrollers or ASICs and higher voltage
components.
TABLE 1. SUMMARY OF FEATURES
DATA NUMBER
PART RATE
OF
EN I/OVLSHDN
NUMBER (Mbps) CHANNELS PIN? STATE
I/OVCC
SHDN
STATE
ISL3034E 100
ISL3035E 100
6
YES 16.5kΩ
16.5kΩ
to VL
to VCC
6
NO 75kΩ to VL
High
Impedance
ISL3036E 100
4
YES 16.5kΩ
16.5kΩ
to VL
to VCC
Features
• Best-In-Class ESD Protection: ±15kV IEC61000-4-2 ESD
Protection on ALL Input, Output, and I/O Lines
• 100Mbps Guaranteed Data Rate
• Four (ISL3036) or Six (ISL3034, ISL3035) Bi-directional
Channels
• Auto-direction Sensing Eliminates Direction Control Logic
Pins
• Enable Input (ISL3034E, ISL3036E) for Logic Control of
Low Power SHDN Mode
• Clock Return Output (ISL3035E)
• Compatible with 4mA Input Drivers or Larger
• +1.35V VL +3.2V and +2.2V VCC +3.6V Supply
Voltage Range
• Pb-Free (RoHS Compliant)
• 16Ld µTQFN (2.6mmx1.8mm), 16 Ld TQFN (3mmx3mm),
and 14 Ld QFN (3.5mmx3.5mm) Packages
Applications
• Simplifies the Interface Between Two Logic ICs Operating
at Different Supply Voltages
• SD Card and MiniSD Card Level Translation
• MMC (Multi Media Card) Level Translation
• Memory Stick Card Level Translation
Typical Operating Circuit
+1.8V
0.1µF
+3.3V
0.1µF 1µF
+1.8V
SYSTEM
CONTROLLER
DAT3
DAT2
DAT1
DAT0
CMD
CLOCK
CLOCK_IN
VL VCC
ISL3035E
I/OVL I/OVCC
I/OVL I/OVCC
I/OVL I/OVCC
I/OVL I/OVCC
I/OVL I/OVCC
CLK_VLCLK_VCC
CLK_RET
+3.3V
SD CARD
DAT3
DAT2
DAT1
DAT0
CMD
CLOCK
GND
GND
GND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL3035E pdf, ピン配列
www.PDaitnaSohueetts4U(.Ccoomntinued)
ISL3035E
(16 LD TQFN)
TOP VIEW
ISL3034E, ISL3035E, ISL3036E
ISL3035E
(16 LD µTQFN)
TOP VIEW
I/OVL1 1
VL 2
I/OVL2 3
I/OVL3 4
THERMAL
PAD
12 CLK_VL
11 CLK_RET
10 I/OVL5
9 I/OVL4
I/OVL1 1
VL 2
I/OVL2 3
I/OVL3 4
12 CLK_VL
11 CLK_RET
10 I/OVL5
9 I/OVL4
ISL3036E
(14 LD QFN)
TOP VIEW
I/OVL1 2
I/OVL2 3
I/OVL3 4
I/OVL4 5
NC 6
1 14
THERMAL
PAD
78
13 I/OVCC1
12 I/OVCC2
11 I/OVCC3
10 I/OVCC4
9 NC
ISL3036E
(16 LD µTQFN)
TOP VIEW
I/OVL1 1
I/OVL2 2
I/OVL3 3
I/OVL4 4
12 I/OVCC1
11 I/OVCC2
10 I/OVCC3
9 I/OVCC4
Pin Descriptions
NAME
FUNCTION
NOTES
VCC
VL
GND
VCC power supply, +2.2V to +3.6V. Decouple VCC to ground with a 0.1µF capacitor.
VL logic supply, +1.35V to +3.2V. Decouple VL to ground with a 0.1µF capacitor.
Ground Pin
For normal operation, VCC > VL.
For normal operation, VCC > VL.
EN ±15kV IEC61000 ESD Protected Enable Input. Logic “0” puts the device in shutdown. Logic ISL3034E and ISL3036E only
“1” enables the device.
I/OVCCx
CLK_VCC
I/OVLx
CLK_VL
CLK_RET
±15kV IEC61000 ESD Protected Input/Output channel referenced to VCC.
±15kV IEC61000 ESD Protected Input/Output clock channel referenced to VCC.
±15kV IEC61000 ESD Protected Input/Output channel referenced to VL.
IEC61000 ESD Protected Input clock channel referenced to VL.
IEC61000 ESD Protected Output clock channel referenced to VL.
ISL3035E only
ISL3035E only
ISL3035E only
3 FN6492.0
March 31, 2009


3Pages


ISL3035E 電子部品, 半導体
ISL3034E, ISL3035E, ISL3036E
www.DEaletacSthreiceta4lUS.cpomecifications
PARAMETER
VCC = +2.2V to +3.6V, VL = +1.35V to +3.2V, EN = VL, unless otherwise noted. Typical values are at
VCC = +3.3V, VL = +1.8V and TA = +25°C. (Note 6). (Continued)
SYMBOL
TEST CONDITIONS
TEMP MIN
MAX
(°C) (Note 8) TYP (Note 8) UNITS
I/OVL, CLK_RET Fall Time
tFVL
RS = 150Ω, CI/OVL = 15pF,
CCLK_RET = 15pF
I/OVCC, CLK_VCC Propagation
Delay (Driving I/OVL, CLK_VL)
tPDVCC
RS = 150Ω, CI/OVCC = 10pF,
CCLK_VCC = 10pF, push-pull
drivers
VL 1.35V
VL 1.62V
VL 1.35V
VL 1.62V
Full
Full
Full
Full
-
-
-
-
- 4 ns
- 3.5 ns
- 7.5 ns
- 6.5 ns
tPDVCC Channel-to-Channel
Skew (Note 9)
I/OVL, CLK_RET Propagation
Delay (Driving I/OVCC,
CLK_VCC)
tPDVL Channel-to-Channel Skew
(Note 9)
Delay from EN High to I/OVCC
Active
tSKEWC
tPDVL
tSKEWL
tEN-VCC
VL 1.35V
VL 1.62V
RS = 150Ω, CI/OVL = 15pF, CCLK_RET = 15pF,
push-pull drivers
VL 1.35V
VL 1.62V
RLOAD = 1MΩ, CI/OVCC = 10pF (ISL3034E and
ISL3036E)
Full
Full
Full
Full
Full
25
- - 1.3 ns
- - 1 ns
- - 6.5 ns
- - 1.3 ns
- - 0.8 ns
- 1.5 - µs
Delay from EN High to I/OVL
Active
tEN-VL RLOAD = 1MΩ, CI/OVL = 15pF (ISL3034E and
ISL3036E)
25
- 1.5
-
µs
Maximum Data Rate
D.R.1.35
D.R.1.6
Push-pull operation,
RSOURCE = 150Ω,
CI/OVCC = 10pF, CI/OVL = 15pF,
CCLK_VCC = 10pF,
CCLK_RET = 15pF
VL 1.35V
VL 1.62V
Full
Full
85
100
-
-
- Mbps
- Mbps
NOTES:
6. VL must be less than or equal to VCC - 0.2V during normal operation. However, VL can be greater than VCC during start-up and shutdown
conditions and the part will not latch-up nor be damaged.
7. Input thresholds are referenced to the boost circuit.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
9. Delta between all I/OVL channel prop delays, or delta between all I/OVCC channel prop delays, all channels tested at the same test conditions.
Test Circuits and Waveforms
VL
EN
VL VCC
SIGNAL
GENERATOR
I/OVL
150Ω
I/OVCC
CL
I/OVL
50%
tPLH
I/OVCC
50%
10%
tRVCC
90%
50%
VL
90%
0V
tPHL
50%
10%
VOH
VOL
tFVCC
tPDVCC = tPLH or tPHL
FIGURE 1A. TEST CIRCUIT
FIGURE 1B. MEASUREMENT POINTS
FIGURE 1. I/OVCC OUTPUT PROPAGATION DELAY AND TRANSITION TIMES (PUSH - PULL)
6 FN6492.0
March 31, 2009

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部品番号部品説明メーカ
ISL3035E

(ISL3034E - ISL3036E) Auto-direction Sensing Logic Level Translators

Intersil Corporation
Intersil Corporation


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