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PDF ISL6260C Data sheet ( Hoja de datos )
| Número de pieza | ISL6260C | |
| Descripción | Multiphase PWM Regulator | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
March 6, 2009
ISL6260C
FN9259.2
Multiphase PWM Regulator for IMVP-6
Mobile CPUs
The ISL6260C is a multiple phase PWM buck regulator for
miroprocessor core power supply. The multiple phase
implementation results in better system performance, superior
thermal management, lower component cost, reduced power
dissipation, and smaller implementation area. The ISL6260C
multiphase controller together with ISL6208 external gate
drivers provide a complete solution to power Intel's mobile
microprocessors. The PWM modulator of ISL6260C is based
on Intersil's Robust Ripple Regulator technology (R3).
Compared with the traditional multiphase buck regulator, the R3
modulator commands variable switching frequency during load
transients, which achieves faster transient response. With the
same modulator, the switching frequency is reduced at light
load conditions resulting higher operation efficiency.
Intel Mobile Voltage Positioning (IMVP) reduces power
dissipation for Intel Pentium processors. The ISL6260C is
designed to be completely compliant with IMVP-6
specifications. ISL6260C responds to PSI# signal by adding or
dropping PWM2 and adjusting overcurrent protection
accordingly. To reduce audible noise, the DPRSLPVR signal
can be used to reduce output voltage slew rates when entering
and exiting Deeper Sleep State according to Intel specification.
The ISL6260C has several other key features. ISL6260C
reports output power through a power monitor pin. Current
sense can be achieved by using either inductor DCR or
discrete precision resistor. In the case of DCR current
sensing, a single NTC thermistor is used to thermally
compensate the inductor DCR variation with temperature. A
unity gain, differential amplifier is available for remote
voltage sensing. This allows the voltage on the CPU die to
be accurately regulated to meet Intel IMVP-6 specifications.
Features
• Precision Multiphase Core Voltage Regulation
- 0.5% System Accuracy Over Temperature
- Enhanced Load Line Accuracy
• Microprocessor Voltage Identification Input
- 7-Bit VID Input
- 0.300V to 1.500V in 12.5mV Steps
- Supports VID Changes On-The-Fly
• Multiple Current Sensing Approaches Supported
- Lossless DCR Current Sensing
- Precision Resistive Current Sensing
• Supports PSI# and Narrow VDC for Enhanced Battery Life
(EBL) Initiatives
• Superior Noise Immunity and Transient Response
• Power Monitor and Thermal Monitor
• Differential Remote Voltage Sensing
• High Efficiency Across Entire Load Range
• Programmable 1, 2 or 3 Power Channels
• Excellent Dynamic Current Balance between Channels
• Small Footprint 40 Ld 6x6 QFN Package
• Pb-Free Available (RoHS Compliant)
Applications
• Mobile Laptop Computers
Ordering Information
PART NUMBER
(Note)
PART MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL6260CCRZ
ISL6260 CCRZ
-10 to +100
40 Ld 6x6 QFN
L40.6x6
ISL6260CCRZ-T*
ISL6260 CCRZ
-10 to +100
40 Ld 6x6 QFN Tape and Reel
L40.6x6
ISL6260CIRZ
ISL6260 CIRZ
-40 to +100
40 Ld 6x6 QFN
L40.6x6
ISL6260CIRZ-T*
ISL6260 CIRZ
-40 to +100
40 Ld 6x6 QFN Tape and Reel
L40.6x6
*Please refer to TB347 for details on reel specifications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6260C
www.EDaletacSthreiceta4lUS.cpomecifications
Operating Conditions: VDD = 5V, TA = -40°C to +100°C, unless otherwise noted. Parameters with MIN and/or
MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
FB Input Current
ISEN
IIN(FB)
10 150 nA
Imbalance Voltage
Maximum of ISENs - Minimum of ISENs
2 mV
Input Bias Current
20 nA
SOFT CURRENT
Soft-start Current
ISS
SOFT Geyserville Current
IGV
SOFT Deeper Sleep Entry Current
IC4
SOFT Deeper Sleep Exit Current
IC4EA
SOFT Deeper Sleep Exit Current
IC4EB
POWER GOOD AND PROTECTION MONITORS
|SOFT-VDAC| >100mV
DPRSLPVR = 3.3V
DPRSLPVR = 3.3V
DPRSLPVR = 0V
-47
±180
-47
37
180
-42
±205
-42
42
205
-37
±230
-37
47
230
µA
µA
µA
µA
µA
PGOOD Low Voltage
PGOOD Leakage Current
PGOOD Delay
VOL
IOH
tpgd
IPGOOD= 4mA
PGOOD = 3.3V
CLK_ENABLE# LOW to PGOOD HIGH
0.26 0.4
-1 1
6.3 7.6 8.9
V
µA
ms
Overvoltage Threshold
Severe Overvoltage Threshold
OCSET Reference Current
OC Threshold Offset
OVH
OVHS
VO rising above setpoint for >1ms
VO rising for >2µs
I(RBIAS) = 10µA
DROOP rising above OCSET for >150µs
160 200 240 mV
1.675 1.7 1.725
V
9.8 10 10.2 µA
-2 4 mV
Current Imbalance Threshold
One ISEN above another ISEN for >1.2ms
9 mV
Undervoltage Threshold
(VDIFF/SOFT)
UVf VO falling below setpoint for >1.2ms
-355 -295 -235
mV
LOGIC THRESHOLDS
VR_ON and DPRSLPVR Input Low
VR_ON and DPRSLPVR Input High
VID0-VID6, PSI#, DPRSTP# Input
Low
VIL(3.3V)
VIH(3.3V)
VIL(1.0V)
1.0 V
2.3 V
0.3 V
VID0-VID6, PSI#, DPRSTP# Input
High
VIH(1.0V)
0.7 V
PWM
PWM (PWM1-PWM3) Output Low
FCCM Output Low
VOL(5.0V)
VOL_FCCM
Sinking 5mA
Sinking 3mA
1.0 V
1.0 V
PWM (PWM1-PWM3) and FCCM
Output High
VOH(5.0V) Sourcing 5mA
3.5 V
PWM Tri-State Leakage
PWM = 2.5V
-1 1 µA
THERMAL MONITOR
NTC Source Current
NTC = 1.3V
53 60 67 µA
Over-Temperature Threshold
V (NTC) falling
1.18 1.2 1.22
V
VR_TT# Low Output Resistance
CLK_EN# OUTPUT LEVELS
RTT I = 20mA
6.5 9
Ω
CLK_EN# High Output Voltage
CLK_EN# Low Output Voltage
POWER MONITOR
VOH
VOL
3V3 = 3.3V, I = -4mA
I = 4mA
2.9 3.1
0.26 0.4
V
V
PMON Output Voltage
Vpmon
VSEN = 1.2V, Droop-Vo = 80mV
1.638 1.68 1.722
V
VSEN = 1.0V, Droop-Vo = 20mV
0.308 0.35 0.392
V
5 FN9259.2
March 6, 2009
5 Page 
ISL6260C
www.TDaytapSihceaetl4UO.cpomerating Performance (Continued)
VOUT
DPRSTP# AND PSI#
DPRSLPVR AND MSB
VOUT @ 1.7V
PWM
VOUT @ 0.85V
FIGURE 25. C4 ENTRY AND EXIT SLEW RATES WITH
DPRSLPVR AND DPRSTP#
FIGURE 26. 1.7V OVP SHOWING OUTPUT PULLED LOW TO
0.85V AND PWM TRI_STATE
PWM
PGOOD
VOUT
PWM
IPHASE
VOUT
PGOOD
FIGURE 27. UNDERVOLTAGE RESPONSE SHOWING PWM
TRI-STATE, VOUT < VID - 300mV
VOUT
PWM
IPHASE
PGOOD
FIGURE 28. OCP - RESPONSE
VOUT
PSI#
CLK_EN#
PHASE 2
FIGURE 29. WOCP - SHORT CIRCUIT PROTECTION
11
FIGURE 30. ISL6260C, PHASE ADDING AND DROPPING IN
ACTIVE MODE, LOAD CURRENT = 15A
FN9259.2
March 6, 2009
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet ISL6260C.PDF ] | |
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