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PDF PI3033B Data sheet ( Hoja de datos )
| Número de pieza | PI3033B | |
| Descripción | Contact Image Sensor | |
| Fabricantes | AMI SEMICONDUCTOR | |
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Division of
Semiconductor
REVISION NUMBER: REV B
DATE: 03/18/05
PAGES: Page 1 of 13
PI3033B Contact Image Sensor
Preliminary Data Sheet
1 page  
Preliminary PI3033B datasheet
www.DataSheet4U.com
Electro-Optical Characteristics (25o C)
The electro-optical characteristics of PI3033B imaging sensor chip are listed in Table 2. These values
are measured at 25o C.
Parameters
Number of Photo-elements
Pixel-to-pixel spacing
Line scanning rate
Clock frequency
Output voltage
Output voltage non-uniformity
Dark output voltage
Dark output non-uniformity
Adjacent Pixel non-uniformity
Chip-to-chip non-uniformity
Symbols
Tint (1)
Fclk (2)
Vpavg (3)
Up (4)
Vd (5)
Ud (6)
Upadj (7)
Ucc (8)
Typical
64
125
864
2.0
1.0
± 7.5
<20
<10
<7.5
± 7.5
Units
elements
µm
µs/line
MHz
V
%
mV
mV
%
%
Notes
See note 2 for higher clock
speed. (maximum 5 MHz)
Exp = 1.8 X 10 –2 µJ/cm 2
Note 5 & 3
Note 6 & 3
Table 2. Electro-Optical Characteristic
Notes: (1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
Tint stands for the line scanning rate or the integration time. It is determined by
the time interval between two start pulses.
Fclk stands for the input clock frequency. For Fclk > 2.0 MHz see note 3 and the
section Video Output Response Under Exposure.
Vpavg = ∑Vp(n)/Npixels (average level in one line scan).
Where Vp(n) is the amplitude of nth pixel in the sensor chip and
Npixels is the total number of pixels in sensor chip. Vpavg is converted from
impulse current video pixel into a voltage output. See Figure 4, Video Pixel
Output in section Output Circuit Of The Image Sensor and Figure 5, Video
Output Test and Application Circuit in section Signal Conversion Circuit on page
6 and 7.
Exp = LP x Tint, where LP is light power (Yellow-Green) and Tint is as defined
above. See Figure 6, Vpavg Output versus Light Exposure in section Video
Output Response Under Exposure, on page 8.
Up is the uniformity specification, measured under a uniform exposing light
exposure. Up = [Vp(max) - Vpavg] / Vpavg x 100% or [Vpavg - Vp(min)] / Vpavg}
x 100%, whichever is greater.
Where Vp(max) is the maximum pixel output voltage in the light.
Vp(min) is the minimum pixel output voltage in the light.
Vd = ∑Vp(n)/Npixels. Where Vp(n) is the pixels signal amplitude of the nth pixel
of the sensor. Dark is where the sensor is placed in the dark environment.
Ud = Vdmax – Vdmin. Dark is same definition as above.
Upadj = MAX[ | (Vp(n) - Vp(n+l) | / Vp(n)) x 100%. Upadj is the nonuniformity in
percentage. It is the amplitude difference between two neighboring pixels.
Ucc is the uniformity specifications, measured among the good die on the wafer.
Under uniform light exposure the sensors are measured and calculated with
following algorithm: Vpavg of all the good dies on the wafer are averaged and
assigned VGpavg. Then the die with maximum Vpavg is assigned Vpavg(max),
Page 5 of 13 Date: 03/18/05
5 Page 
Preliminary PI3033B datasheet
www.DataSheet4U.com
(2) Prohibit crossing time is to insure that no two start pulses are locked into the shift
register for any single scan time. Since the start pulse is entered into the shift
register during its active high level when the CP clock edges falls, the active high
of the start pulse is permitted only during one falling, CP, clock edges for any
given scan. Otherwise, multiple start pulses will load into the shift register.
(3) Pixel delay times and settling time depend on the output amplifier, which is
employed. These values, tdl and ts/h, are measured with the amplifier see in
Figure 9. Typical A6 CIS Module Circuit using the PI3033B sensors. Note, the
impulse signal current out of the device has pulse width ~ 30 ns. Hence, the
faster the amplifier with a faster settling time will yield a signal video pulse with
faster rise and settle times.
Typical A6 CIS Module Circuit
See Figure 9. Typical A6 CIS Module Circuit using the PI3033B sensors. The circuit is provided as
reference to illustrate the interconnection of the PI3033B for a serially cascaded line of image sensors.
It is a typical A6 size CIS module produced by PIC. It provides the first time user with additional insight
for designing a CIS module and supplements the circuit descriptions given in the section, Signal
Output Conversion, page 5.
The difference is in the arrangement of the two shunt switches, U2D, and U2A. U2D is a counterpart
to SW in Figure 5. Video Output Test and Application Circuit. A DC restoration capacitor, C20,
with value of 100pf added between the shunts switch. The first, U2D, clamps the video line to
ground to reset the image sensors. Simultaneously the second, U2A, clamps the node
between C20 and amplifier input to a output reference bias voltage that is on the node
between R4 and R9. These resistors are voltage divider that sets the DC operating level of
the amplifier’s output by applying same bias voltage to both inputs of the amplifier
(See next page for the Typical A6 CIS Module Circuit.)
Page 11 of 13 Date: 03/18/05
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet PI3033B.PDF ] | |
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