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PDF APL0189 Data sheet ( Hoja de datos )

Número de pieza APL0189
Descripción PLL Module
Fabricantes Advanced Semiconductor Business 
Logotipo Advanced Semiconductor Business Logotipo



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No Preview Available ! APL0189 Hoja de datos, Descripción, Manual

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Features
· +4 dBm Output Level at 189.25 MHz
· Channel Step Size : 25 kHz
· 2nd Harmonic : < -20 dBc
· Spurious Level : < -70 dBc
· Lock Time : < 10 ms
· 22 mA Current Consumption
Description
The plerowTM PLL synthesizer module was
designed for use in wireless and wireline
systems in a wide range of frequency from
50 MHz to 6 GHz. ASB’s PLL provides
exceptionally low spurious and phase noise
performance with fast locking time and low
current consumption. All products are
available in a surface-mount type package.
Specifications
Parameter
Unit Min.
Typical
Max.
Frequency Range
Output Power
Supply Voltage
Current Consumption
Channel Step Size
2nd Harmonics
Spurious Level
Lock Time
Reference Frequency
Reference Input Level
MHz
dBm
V
mA
kHz
dBc
dBc
ms
MHz
dBm
3
4.7
-5
189.25
4
5.0
22
25
-35
-78
3
10
0
5
5.3
30
-20
-70
10
5
Phase Noise (C / N)
@ 10 kHz
dBc/Hz
-111
-108
-105
@ 100 kHz
Output Impedance
Operating Temp. Range
Package Type & Size
dBc/Hz
°C
mm
-124
-121
-118
50
-40 25
85
SMT, 19.0W×19.0L×5.8H
1) Measurement conditions are as follows: T = 25°C, VCC = 5 V, Freq. = 189.25 MHz, 50 ohm system.
Plerow APL0189
PLL Module
More Information
Website: www.asb.co.kr
Tel: (82) 42-528-7220
Fax: (82) 42-528-7222
ASB, Inc., 4th Fl. Venture Town
Bldg, KT HRDC, 367-17
Goijeong-Dong, Seo-Gu,
Daejeon, 302-716, Korea
Outline Drawing
Top View
A
C
B
Side View
Bottom View
I
HG
D
E
F
Pin Configuration
1 CLOCK
2 DATA
3 ENABLE
4 OSC IN
9 VCC (VCO)
13 RF OUT
15 VCP (PLL)
16 LOCK DETECT
Others
Ground
Dimension (mm)
A 19.0
B 19.0
C 5.8
D 1.5
E 0.5
F 1.75
G 1.35
H 15.0
I 0.9
Tolerance: ± 0.2
1/1
www.asb.co.kr
March 2004

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