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PDF NJW1172 Data sheet ( Hoja de datos )
| Número de pieza | NJW1172 | |
| Descripción | Audio Processor | |
| Fabricantes | JRC | |
| Logotipo |  |
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NJW1172
AUDIO PROCESSOR
s GENERAL DESCRIPTION
s PACKAGE OUTLINE
The NJW1172 is a sound processor includes all of the
functions required to process the audio signal for TV, such
as tone control, balance, volume, mute, and AGC functions.
Also the NJW1172 performs BBE sound enhancement
and SRS 3D Stereo. The BBE regenerates high definitive
and nearly real sound, and SRS 3D Stereo regenerates 3D
surround sound with only two speakers.
All of the internal status and variables are controlled by
I2C BUS interface.
NJW1172GK1
s FEATURES
qOperating Voltage
8 to 13V
q I2C BUS Interface
q BBE Sound Enhancement (Low Boost and High Boost: 15dB max.)
q Internal 6 Input Audio Selectors and Monitor Output
q The AGC circuit reduces volume difference among input sources.
q Variable AGC Compression Level via I2C (4-levels)
q SRS 3D Stereo and Simulated Stereo
q Variable Surround Effect Level via I2C
q Low Noise VCA
q Bi-CMOS Technology
q Package Outline
SOP40-K1
sBLOCK DIAGRAM
IN1a
IN2a
IN3a
IN4a
IN5a
IN6a
IN1b
IN2b
IN3b
IN4b
IN5b
IN6b
MONa VCAINa AGC
SEL VOL1
AGC
SEL VOL1
MONb VCAINb
SRS
3D Stereo
&
Sim ulated
Stere o
TONE TONE
-Ha -La
OUTa
BBE
TONE
VOL2
BBE
TONE
VOL2
I2C BUS
Interface
SDA
SCL
CVA
CVB
CTH
CTL
CSR
CSB
Bias
GND
Vcc
TONE TONE
-Hb -Lb
OUTb
Vref
-1-
1 page  
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NJW1172
s ELECTRICAL CHARACTERISTICS ( Ta=25°C, V+=9V, Rg=600Ω, RL=47kΩ, Vin=100mVrms)
q SIMULATED SURROUND (Simulated Surround-ON, f=1kHz)
PARAMETER
SYMBOL
TEST CONDITION
MIN. TYP. MAX.
SURROUND SIM A
SURROUND SIM B
SRSIMA
SRSIMB
Ain+Bin → Aout
Ain+Bin → Bout
1.0 3.0 5.0
1.0 3.0 5.0
UNIT
dB
dB
q SRS 3D-Stereo (SRS 3D Stereo-ON, f=125Hz)
PARAMETER
SYMBOL
TEST CONDITION
SRS GAIN HIGH 1
SRS GAIN HIGH 2
SRS GAIN LOW 1
SRS GAIN LOW 2
SRS GAIN HIGH 3
SRS GAIN HIGH 4
SRSGH1
SRSGH2
SRSGL1
SRSGL2
SRSGH3
SRSGH4
Ain → Aout, Mode=High
Bin → Bout, Mode=High
Ain → Aout, Mode=Low
Bin → Bout, Mode=Low
Bin → Aout, Mode=High
Ain → Bout, Mode=High
MIN.
10.0
10.0
7.0
7.0
6.8
6.8
TYP.
12.0
12.0
9.0
9.0
8.8
8.8
MAX.
14.0
14.0
11.0
11.0
10.8
10.8
UNIT
dB
dB
dB
dB
dB
dB
-5-
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s APPLICATION CIRCUIT 1
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
4.7µF
22nF
3.3nF
33nF
1.5nF
220nF
4.7µF
0.33µF
1µF
1µF
1 IN1a
2 IN2a
3 IN3a
4 IN4a
5 IN5a
6 IN6a
7 MONa
8 SRS/SS FIL1
9 BBE1a
10 BBE2a
11 TONE-Ha
12 TONE-La
13 VCAINa
14 OUTa
15 AGC
16 CVa
17 CVb
18 SDA
19 SCL
20 GND
IN1b 40
IN2b 39
IN3b 38
IN4b 37
IN5b 36
IN6b 35
MONb 34
SRS FIL2 33
BBE1b 32
BBE2b 31
TONE-Hb 30
TONE-Lb 29
VCAINb 28
OUTb 27
CSR 26
CTH 25
CTL 24
CSB 23
Vref 22
V+ 21
NJW1172
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
4.7µF
3.3nF
33nF
1.5nF
220nF
330nF
4.7kΩ
8.2nF
4.7µF
1µF
1µF
1µF
1µF
1µF
1µF
(NOTE)
1. Separate the I2C bus line from the following terminals for avoiding digital noise problem.
Pin No.
8
9
Symbol
SRS/SS FIL1
BBE1a
Pin No.
10
11
Symbol
BBE2a
TONE-Ha
Pin No.
12
29
Symbol
TONE-La
TONE-Lb
Pin No.
30
31
Symbol
TONE-Hb
BBE2b
Pin No.
32
33
Symbol
BBE1b
SRS FIL2
- 11 -
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| PDF Descargar | [ Datasheet NJW1172.PDF ] | |
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