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PDF ISL29020 Data sheet ( Hoja de datos )

Número de pieza ISL29020
Descripción A Low Power High Sensitivity / Light-to Digital Sensor
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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®
Data Sheet
September 26, 2008
ISL29020
FN6505.0
A Low Power, High Sensitivity, Light-to
Digital Sensor With I2C Interface
www.TdahteasISheLe2t94u0.2c0omis a low power, high sensitivity, integrated light
sensor with I2C (SMBus Compatible) interface. Its
state-of-the-art photodiode array provides close-to human
eye response and good IR rejection. This ADC is capable of
rejecting 50Hz and 60Hz flicker caused by artificial light
sources. The lux range select feature allows the user to
program the lux range for optimized counts/lux.
In normal operation, typical power consumption 55µA. In
order to further minimize power consumption, two
power-down modes have been provided. If polling is chosen
over continuous measurement of light, the auto-power-down
function shuts down the whole chip after each ADC
conversion for the measurement. The other power-down
mode is controlled by software via the I2C interface. The
power consumption can be reduced to less than 1µA when
powered down.
Designed to operate on supplies from 2.25V to 3.3V with I2C
supply from 1.7V to 3.6V, the ISL29020 is specified for
operation over the -40°C to +85°C ambient temperature
range.
Ordering Information
PART NUMBER
(Note)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL29020IROZ-T7*
6 Ld ODFN
L6.2x2.1
ISL29020IROZ-EVALZ
Evaluation Board (Pb-free)
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and NiPdAu plate - e4 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free
peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
Block Diagram
VDD
1
PHOTODIODE
ARRAY
LIGHT
DATA
PROCESS
IREF
INTEGRATING
ADC
EXT
TIMING
fOSC
216
COUNTER
3
REXT
2
GND
ISL29020
COMMAND
REGISTER
DATA
REGISTER
I2C/SMBus
5 SCL
6 SDA
4
A0
Features
• Low Power
- 65µA Max Operating Current
- 0.5µA Max Shutdown Current
- Software Shutdown and Automatic Shutdown
• Ideal Spectral Response
- Close to Human Eye Response
- Excellent IR and UV Rejection
• Easy to Use
- Simple Output Code Directly Proportional to lux
- I2C (SMBus Compatible) Output
- No Complex Algorithms Needed
- Variable Conversion Resolution up to 16-bits
- Adjustable Sensitivity up to 65 Counts per lux
- Works Under Various Light Sources, Including Sunlight
- Selectable Range (via I2C)
- Range 1 = 0.015 lux to 1,000 lux
- Range 2 = 0.06 lux to 4,000 lux
- Range 3 = 0.24 lux to 16,000 lux
- Range 4 = 0.96 lux to 64,000 lux
- Temperature Compensated
- Integrated 50/60Hz Noise Rejection
• Small Form Factor
- 2.0mmx2.1mmx0.7mm 6 Ld ODFN Package
• Additional Features
- I2C and SMBus Compatible
- 1.7V to 3.6V Supply for I2C Interface
- 2.25V to 3.3V Supply
- Address Selection Pin
• Pb-Free (RoHS compliant)
Applications
• Display and keypad dimming for:
- Mobile devices: smart phone, PDA, GPS
- Computing devices: notebook PC, webpad
- Consumer devices: LCD-TV, digital picture frame, digital
camera
• Industrial and medical light sensing
Pinout
ISL29020
(6 LD ODFN)
TOP VIEW
VDD 1
6 SDA
GND 2
5 SCL
REXT 3
4 A0
*EXPOSED PAD CAN BE CONNECTED TO GND OR
ELECTRICALLY ISOLATED
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.

1 page




ISL29020 pdf
ISL29020
Register Set
There are three 8-bit registers in the ISL29020. Table 1 summarizes their functions.
TABLE 1. REGISTER SET
BIT
ADDR REG NAME
7
6
5
4
32
www.data0s0hheet4uC.cOoMmMAND
01h DATALSB
02h DATAMSB
EN
D7
D15
MODE
D6
D14
LIGHT
D5
D13
RES2
D4
D12
RES1
D3
D11
RES0
D2
D10
1
RANGE1
D1
D9
0
RANGE0
D0
D8
DEFAULT
00h
00h
00h
TABLE 2. WRITE ONLY REGISTERS
ADDRESS
b1xxx_xxxx
NAME
sync_I2C
FUNCTIONS/DESCRIPTION
Writing a logic 1 to this address bit
ends the current ADC-integration
and starts another. Used only with
External Timing Mode.
Command Register (00 hex)
The Read/Write command register has five functions:
1. Enable: Bit 7. This bit enables the ISL29020 with logic 1
and powers down ISL29020 with logic 0.
TABLE 3. ENABLE
BIT 7
OPERATION
0 Power-down the device
1 Enable the device
2. Measurement Mode: Bit 6. This bit controls the two
measurement modes of the device. A logic 0 puts the
device in the one-time measurement mode in which the
device is automatically shut-down after each
measurement. A logic 1 puts the device in the continuous
measurement mode in which data is collected
continuously.
TABLE 4. MEASUREMENT MODE
BIT 6
OPERATION
0 One-time measurement
1 Continuous measurement
3. Light Sensing: Bit 5. This bit programs the device to do the
ambient light or the infrared (IR) light sensing. A logic 0,
requests for the ambient light sensing and a logic 1
requests for the IR sensing.
TABLE 5. LIGHT SENSING
BIT 5
OPERATION
0 Ambient light sensing
1 Infrared light sensing
4. Timing Mode and Resolution: Bits 4, 3 and 2. These three
bits determine whether the integration time is done
internally or externally, and the number of bits for ADC. In
Internal Timing Mode, integration time is determined by
an internal oscillator (fOSC) and the n-bit (n = 4, 8, 12, 16)
counter inside the ADC. In External Timing Mode, the
integration time is determined by the time between two
consecutive sync_I2C pulse commands.
TABLE 6. TIMING MODE AND RESOLUTION
BITS 4:3:2
MODE
0:0:0 Internal Timing, 16-bit ADC data output
0:0:1 Internal Timing, 12-bit ADC data output
0:1:0 Internal Timing, 8-bit ADC data output
0:1:1 Internal Timing, 4-bit ADC data output
1:0:0 External Timing, ADC data output
1:0:1 External Timing, Timer data output
1:1:0 Reserved
1:1:1 Reserved
With Bit 4 set to 0, the device is configured to run in the
Internal-Timing mode. For example, the command register
content should be 1xx000xx to request 16-bit ADC in the
internal-timing mode.
With Bit 4 set to 1, the device is configured to run in the
External-Timing mode. For the external timing, the command
1xx101xx needs to be sent to request the Timer data, the
number of clock cycles counted within the duration between
the two sync pulses (refer to Table 2). The Timer count is
read from register 01h (LSB) and 02h (MSB). The command
1xx100xx needs to be sent to request the ADC conversion.
The ADC data is also read from register 01h (LSB) and 02h
(MSB).
Bits 3 and 2 determine the number of clock cycles per
conversion in the Internal-Timing mode. Changing the
number of clock cycles does more than just change the
resolution of the device. It also changes the integration
time, which the ADC uses to sample the photodiode
current signal for a measurement.
5 FN6505.0
September 26, 2008

5 Page





ISL29020 arduino
ISL29020
Package Outline Drawing
L6.2x2.1
6 LEAD OPTICAL DUAL FLAT NO-LEAD PLASTIC PACKAGE (ODFN)
Rev 0, 9/06
www.datasheet4u.com
2.10
A
B
6
PIN 1
INDEX AREA
0.65
6
PIN 1
INDEX AREA
1
1 . 35 1 . 30 REF
(4X) 0.10
(0 . 65)
TOP VIEW
(0 . 65)
(1 . 35)
6X 0 . 30 ± 0 . 05
0 . 65
6X 0 . 35 ± 0 . 05
BOTTOM VIEW
0.10 M C A B
( 6X 0 . 30 )
MAX 0.75
SIDE VIEW
SEE DETAIL "X"
0.10 C
BASE PLANE
C
SEATING PLANE
0.08 C
(1 . 95)
( 6X 0 . 55 )
TYPICAL RECOMMENDED LAND PATTERN
C 0 . 2 REF
5
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
11 FN6505.0
September 26, 2008

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