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PDF NJW1110 Data sheet ( Hoja de datos )
| Número de pieza | NJW1110 | |
| Descripción | 9-IN 3-OUT STEREO AUDIO SELECTOR | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de NJW1110 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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NJW1110
9-IN 3-OUT STEREO AUDIO SELECTOR
! GENERAL DESCRIPTION
www.datasheNetJ4Wu.c1o1m10 is a 9-input 3-output stereo audio selector.
It includes three independent 9input-1output stereo
audio selectors and adjustable gain buffers.
NJW1110 performs superior audio characteristics
such as low distortion, low output noise and low
crosstalk. All of internal status and variables are
controlled by I2C BUS interface. And the slave
address selector is available for using two chips on
same serial Bus line. It is suitable for latest TV system
and others.
! APPLICATIONS
•FPD TV
•Car Audio System
•Monitor
! FEATURES
• Operating Voltage
7.5 to 15V
• Operating Current
8mA typ.
• 9-Input, 3-Output Stereo Audio Selector
• Low Distortion
0.0007% typ.
• Low Output Noise
116dB typ.
• Low Crosstalk
110dB typ.
• Channel Separation
100dB typ.
• Variable Gain Buffer
0, 3 to 8dB/0.5dB step
• I2C Bus Interface (Comply with fast mode and 3V I/F)
• Selectable 2-Slave Address
• Bi-CMOS Technology
• Package Outline
SSOP32
! PACKAGE OUTLINE
NJW1110V
! BLOCK DIAGRAM
InB1 InB2
InB3 InB4
InB5
InB6
InB7
InB8
InB9
OutB1 OutB2 OutB3
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
10µF
+
32 31 30 29 28 27 26 25 24 23 22 21 20
19
GND
ADR
18
MUTE
V+
+
100µF
17
50KΩX18
Gain
8dB to 3dB
/ 0.5dBstep
Gain
8dB to 3dB
/ 0.5dBstep
Gain
8dB to 3dB
/ 0.5dBstep
Gain
8dB to 3dB
/ 0.5dBstep
Gain
8dB to 3dB
/ 0.5dBstep
Gain
8dB to 3dB
/ 0.5dBstep
Vref
MUTE
12 3 45 6 78 9
10µF + 10µF + 10µF + 10µF + 10µF + 10µF + 10µF + 10µF + 10µF +
GND
10 11 12
13
10µF + 10µF + 10µF +
GND
14
I2C
Control
Logic
15 16
InA1 InA2
InA3 InA4
InA5
InA6
InA7 InA8
InA9
OutA1 OutA2 OutA3
SDA
SCL
–1–
1 page  
NJW1110
! DEFINITION OF I2C REGISTER
♦I2C BUS FORMAT
MSB
LSB
MSB
LSB MSB
S Slave Address A Select Address A
www.datashe1ebti4t u.com
8bit
1bit
8bit
1bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
Data
8bit
LSB
A
1bit
P
1bit
♦ SLAVE ADDRESS
MSB
LSB
1 0 0 1 0 1 0 R/W 94H(ADR=Low)
1 0 0 1 0 1 1 R/W 96H(ADR=High)
R/W=0: Receive Only
R/W=0: Write mode for register setting
R/W=1: Not available
♦ CONTROL REGISTER TABLE
The select address and sets each function.
The auto increment function cycles the select address as follows.
00H→01H→02H→00H
Select
BIT
Address
D7
D6
D5
D4
D3
00H Variable Gain Buffer for OUT1
01H Variable Gain Buffer for OUT2
02H Variable Gain Buffer for OUT3
D2 D1
Input selector for OUT1
Input selector for OUT2
Input selector for OUT3
D0
♦ CONTROL REGISTER DEFAULT VALUE
Control register default value is all “0”.
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H 0 0 0 0 0 0 0 0
01H 0 0 0 0 0 0 0 0
02H 0 0 0 0 0 0 0 0
–5–
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet NJW1110.PDF ] | |
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