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PDF IS41LV8200 Data sheet ( Hoja de datos )

Número de pieza IS41LV8200
Descripción 2M x 8 (16-MBIT) DYNAMIC RAM
Fabricantes Integrated Silicon Solution 
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No Preview Available ! IS41LV8200 Hoja de datos, Descripción, Manual

IS41C8200
IS41LV8200
2M x 8 (16-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
ISSI®
JUNE 2001
www.daFtaEshAeeTt4Uu.RcoEmS
• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs
• Refresh Interval:
-- 2,048 cycles/32 ms
• Refresh Mode: RAS-Only,
CAS-before-RAS (CBR), and Hidden
• Single power supply:
5V±10% or 3.3V ± 10%
• Byte Write and Byte Read operation via two CAS
• Industrial temperature range -40°C to 85°C
PRODUCT SERIES OVERVIEW
Part No.
IS41C8200
IS41LV8200
Refresh
2K
2K
Voltage
5V ± 10%
3.3V ± 10%
PIN CONFIGURATION
28 Pin SOJ
DESCRIPTION
TheISSI IS41C8200andIS41LV8200are2,097,152x8-bithigh-
performance CMOS Dynamic Random Access Memory.
These devices offer an accelarated cycle access called
EDO Page Mode. EDO Page Mode allows 2,048 random
accesses within a single row with access cycle time as
short as 20 ns per 4-bit word.
These features make the IS41C8200 and IS41LV8200
ideally suited for high-bandwidth graphics, digital signal
processing, high-performance computing systems, and
peripheral applications.
The IS41C8200 and IS41LV8200 are packaged in 28-pin
300-mil SOJ with JEDEC standard pinouts.
KEY TIMING PARAMETERS
Parameter
-50 -60 Unit
RAS Access Time (tRAC)
CAS Access Time (tCAC)
50 60 ns
13 15 ns
Column Address Access Time (tAA) 25 30 ns
EDO Page Mode Cycle Time (tPC) 20 25 ns
Read/Write Cycle Time (tRC)
84 104 ns
VCC
I/O0
I/O1
I/O2
I/O3
WE
RAS
NC
A10
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 GND
27 I/O7
26 I/O6
25 I/O5
24 I/O4
23 CAS
22 OE
21 A9
20 A8
19 A7
18 A6
17 A5
16 A4
15 GND
PIN DESCRIPTIONS
A0-A10
I/O0-7
WE
OE
RAS
CAS
Vcc
GND
NC
Address Inputs
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power
Ground
No Connection
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
06/22/01
1

1 page




IS41LV8200 pdf
IS41C8200
IS41LV8200
ISSI ®
ELECTRICAL CHARACTERISTICS(1)
(Recommended Operating Conditions unless otherwise noted.)
Symbol Parameter
Test Condition
VCC Speed Min. Max. Unit
www.datasIhILeet4u.comInput Leakage Current
Any input 0V VIN Vcc
Other inputs not under test = 0V
5 5 µA
IIO
Output Leakage Current
Output is disabled (Hi-Z)
0V VOUT Vcc
5 5 µA
VOH Output High Voltage Level
IOH = 5.0 mA, Vcc = 5V
IOH = 2.0 mA, Vcc = 3.3V
2.4 V
VOL Output Low Voltage Level
IOL = 4.2 mA, Vcc = 5V
IOL = 2 mA, Vcc = 3.3V
ICC1 Standby Current: TTL
RAS, CAS VIH Commercial
Industrial
5V
3.3V
5V
3.3V
ICC2 Standby Current: CMOS RAS, CAS VCC 0.2V
5V
3.3V
0.4 V
2 mA
0.5
3
2
1 mA
0.5
ICC3 Operating Current:
RAS, CAS,
Random Read/Write(2,3,4)
Address Cycling, tRC = tRC (min.)
Average Power Supply Current
ICC4 Operating Current:
RAS= VIL, CAS VIH
EDO Page Mode(2,3,4)
tRC = tRC (min.)
Average Power Supply Current
ICC5
Refresh Current:
RAS-Only(2,3)
RAS Cycling, CAS VIH
tRC = tRC (min.)
Average Power Supply Current
-50 120 mA
-60 110
-50 90 mA
-60 80
-50 120 mA
-60 110
ICC6 Refresh Current:
RAS, CAS Cycling
CBR(2,3,5)
tRC = tRC (min.)
Average Power Supply Current
-50 120 mA
-60 110
Notes:
1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device
operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded.
2. Dependent on cycle rates.
3. Specified values are obtained with minimum cycle time and the output open.
4. Column-address is changed once each EDO Page cycle.
5. Enables on-chip refresh and address counters.
Integrated Silicon Solution, Inc. 1-800-379-4774
Rev. B
06/22/01
5

5 Page





IS41LV8200 arduino
IS41C8200
IS41LV8200
EARLY WRITE CYCLE (OE = DON'T CARE)
www.datasheet4u.com
RAS
tCRP
CAS
tASR
ADDRESS
Row
WE
I/O
tRAS
tRC
tRCD
tCSH
tRSH
tCAS tCLCH
tRAD
tRAH
tASC
tAR
tRAL
tCAH
tACH
Column
tWCR
tWCS
tCWL
tRWL
tWCH
tWP
tDHR
tDS
tDH
Valid Data
ISSI ®
tRP
Row
Dont Care
Integrated Silicon Solution, Inc. 1-800-379-4774
Rev. B
06/22/01
11

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