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AN78M05NSP の電気的特性と機能

AN78M05NSPのメーカーはPanasonic Semiconductorです、この部品の機能は「(AN78MxxNSP) 3-Pin Positive Output Voltage Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号 AN78M05NSP
部品説明 (AN78MxxNSP) 3-Pin Positive Output Voltage Regulator
メーカ Panasonic Semiconductor
ロゴ Panasonic Semiconductor ロゴ 




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AN78M05NSP Datasheet, AN78M05NSP PDF,ピン配置, 機能
Voltage Regulators
www.datasheet4u.com
AN78MxxNSP Series
3-pin positive output voltage regulator (500 mA type)
I Overview
The AN78MxxNSP series is a 3-pin fixed positive
output type monolithic voltage regulator housed in surface
mounting package. Stabilized fixed output voltage is ob-
tained from unstable DC input voltage with using mini-
mum external components. 9 types of fixed output volt-
age are available; 5 V, 6 V, 7 V, 8 V, 9 V, 10 V, 12 V, 15
V and 18 V. They can be used widely in power circuits
with current capacity up to 500 mA.
I Features
Output voltage: 5V,6V,7V,8V,9V,10V,12V,15V,18 V
Built-in overcurrent limit circuit
Built-in thermal overload protection circuit
Built-in ASO (area of safe operation) protection circuit
I Block Diagram
6.50±0.20
5.30±0.10
(4.35)
(3.00)
Unit: mm
1.00±0.20
1
2.30
2
4.60±0.10
3
0.75±0.10
0.55
+0.10
–0.05
0.10±0.10
SP-3SU
Note) The package of this product will be changed
to lead-free type (SP-3SUA). See the new pack-
age dimensions section later of this datasheet.
Current
source
Pass Tr
Current
limitter
RSC
Starter
Voltage
reference
Thermal
Error amp. protection
R2
R1
1
Input
CI
2
FIN
CI 0.33 µF, CO 0.1 µF
I Pin Descriptions
Pin No.
Description
1 Input Input voltage pin
2 GND Ground pin (FIN)
3
Output
Output voltage pin
Publication date: November 2001
SFF00012BEB
CO
3
Output
1

1 Page





AN78M05NSP pdf, ピン配列
AN78MxxNSP Series
www.datasheet4u.com
I Electrical Characteristics at Ta = 25°C (continued)
AN78M06NSP (6 V type)
The specified condition Tj = 25°C means that the test should be carried out within so short a test time (within 10 ms)
that the characteristic value drift due to the chip junction temperature rise can be ignored.
Unless otherwise specified, VI = 11 V, IO = 350 mA, CI = 0.33 µF and CO = 0.1 µF
Parameter
Symbol
Conditions
Min Typ Max Unit
Output voltage
Output voltage tolerance
VO1 Tj = 25°C
5.75 6 6.25
VO2 VI = 8.5 V to 21 V, IO = 5 mA to 350 mA 5.7 6.3
Tj = 25°C
V
V
Line regulation 1
REGIN1 VI = 8.5 V to 25 V, Tj = 25°C
Line regulation 2
REGIN2 VI = 9 V to 25 V, Tj = 25°C
Load regulation 1
REGL1 IO = 5 mA to 500 mA, Tj = 25°C
Load regulation 2
REGL2 IO = 5 mA to 200 mA, Tj = 25°C
Bias current
IBias Tj = 25°C
Bias current fluctuation to input IBias(IN) VI = 9 V to 25 V, Tj = 25°C
Bias current fluctuation to load IBias(L) IO = 5 mA to 350 mA, Tj = 25°C
Ripple rejection ratio
RR VI = 9 V to 19 V, IO = 100 mA, f = 120 Hz
59
5 100
1.5 50
20 120
10 60
46
0.8
0.5

mV
mV
mV
mV
mA
mA
mA
dB
• Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min Typ Max Unit
Output noise voltage
VNO f = 10 Hz to 100 kHz
Minimum input/output voltage VDIF(min) IO = 500 mA, Tj = 25°C
difference
45  µV
2
V
Output short-circuit current
Peak output current
Output voltage temperature
coefficient
IO(Short) VI = 35 V, Tj = 25°C
IO(Peak) Tj = 25°C
VO / Ta IO = 5 mA, Tj = 0°C to 125°C
300 mA
1 000 mA
 − 0.5 mV/°C
Thermal protection operating
temperature
Tj(TH) IO = 5 mA
150  °C
SFF00012BEB
3


3Pages


AN78M05NSP 電子部品, 半導体
AN78MxxNSP Series
www.datasheet4u.com
I Electrical Characteristics at Ta = 25°C (continued)
AN78M09NSP (9 V type)
The specified condition Tj = 25°C means that the test should be carried out within so short a test time (within 10 ms)
that the characteristic value drift due to the chip junction temperature rise can be ignored.
Unless otherwise specified, VI = 15 V, IO = 350 mA, CI = 0.33 µF and CO = 0.1 µF
Parameter
Symbol
Conditions
Min Typ Max Unit
Output voltage
Output voltage tolerance
VO1 Tj = 25°C
8.65 9 9.35
VO2 VI = 11.5 V to 24 V, IO = 5 mA to 350 mA 8.55 9.45
Tj = 25°C
V
V
Line regulation 1
REGIN1 VI = 11.5 V to 25 V, Tj = 25°C
7 100 mV
Line regulation 2
REGIN2 VI = 12 V to 25 V, Tj = 25°C
2 50 mV
Load regulation 1
REGL1 IO = 5 mA to 500 mA, Tj = 25°C
25 180 mV
Load regulation 2
REGL2 IO = 5 mA to 200 mA, Tj = 25°C
10 90 mV
Bias current
IBias Tj = 25°C
4.1 6 mA
Bias current fluctuation to input IBias(IN) VI = 12 V to 25 V, Tj = 25°C
  0.8 mA
Bias current fluctuation to load IBias(L) IO = 5 mA to 350 mA, Tj = 25°C
  0.5 mA
Ripple rejection ratio
RR VI = 12 V to 22 V, IO = 100 mA, f = 120 Hz 56   dB
• Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min Typ Max Unit
Output noise voltage
VNO f = 10 Hz to 100 kHz
Minimum input/output voltage VDIF(min) IO = 500 mA, Tj = 25°C
difference
60  µV
2
V
output short-circuit current
Peak output current
Output voltage temperature
coefficient
IO(Short) VI = 35 V, Tj = 25°C
IO(Peak) Tj = 25°C
VO / Ta IO = 5 mA, Tj = 0°C to 125°C
300 mA
1 000 mA
 − 0.5 mV/°C
Thermal protection operating
temperature
Tj(TH) IO = 5 mA
150  °C
6 SFF00012BEB

6 Page



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部品番号部品説明メーカ
AN78M05NSP

(AN78MxxNSP) 3-Pin Positive Output Voltage Regulator

Panasonic Semiconductor
Panasonic Semiconductor


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