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PDF HD6432210 Data sheet ( Hoja de datos )
| Número de pieza | HD6432210 | |
| Descripción | (HD643221x) 16-Bit Single-Chip Microcomputer H8S Family H8S-2200 Series | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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REJ09B0074-0600
The revision list can be viewed directly by clicking the title page.
The revision list summarizes the locations of revisions and additions.
wDwwe.tDaaitlasShseheto4Uu.lcdomalways be checked by referring to the relevant text.
16
H8S/2218 Group, H8S/2212 Group
Hardware Manual
Renesas 16-Bit Single-Chip Microcomputer
H8S Family/H8S/2200 Series
H8S/2218
H8S/2212
HD64F2218
HD64F2218U
HD6432217
HD64F2212
HD64F2212U
HD64F2211
HD64F2211U
HD6432211
HD6432210
HD6432210S
Rev.6.00
Revision date: Jun. 03, 2008
1 page  
Preface
This LSI is a microcomputer (MCU) made up of the H8S/2000 CPU with Renesas Technology's
original architecture as its core, and the peripheral functions required to configure a system.
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The H8S/2000 CPU has an internal 32-bit configuration, sixteen 16-bit general registers, and a
simple and optimized instruction set for high-speed operation. The H8S/2000 CPU can handle a
16-Mbyte linear address space.
This LSI is equipped with ROM and RAM, a direct memory access controller (DMAC), a bus
master, a 16-bit timer pulse unit (TPU), a watchdog timer (WDT), a realtime clock (RTC), a
universal serial bus (USB), two types of serial communication interfaces (SCIs), an A/D converter,
and I/O ports as on-chip peripheral modules for system configuration.
A single-power flash memory (F-ZTAT™*) version and masked ROM version are available for
this LSI's ROM. The F-ZTAT version provides flexibility as it can be reprogrammed in no time to
cope with all situations from the early stages of mass production to full-scale mass production.
This is particularly applicable to application devices with specifications that will most probably
change.
This manual describes this LSI's hardware.
Note: * F-ZTAT is a trademark of Renesas Technology, Corp.
Target Users:
This manual was written for users who will be using the H8S/2218 Group and
H8S/2212 Group in the design of application systems. Target users are expected to
understand the fundamentals of electrical circuits, logical circuits, and
microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of the H8S/2218 Group and H8S/2212 Group to the target users.
Refer to the H8S/2600 Series, H8S/2000 Series Software Manual for a detailed
description of the instruction set.
Notes on reading this manual:
• In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions and electrical characteristics.
• In order to understand the details of the CPU's functions
Read the H8S/2600 Series, H8S/2000 Series Software Manual.
Rev.6.00 Jun. 03, 2008 Page v of xlviii
REJ09B0074-0600
5 Page 
Item
15.1 Features
Page
535
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16 RAM
551
17.4 Input/Output Pins 560
Table 17.2 Pin
Configuration
18.1 Features
593
19.8 PLL Circuit for 604
USB
Figure 19.9 Example
of PLL Circuit
Revision (See Manual for Details)
Description amended
• Conversion time: 8.1 µs per channel (at 16-MHz operation),
10.7 µs per channel (at 24-MHz operation), 21.8 µs per
channel (at 6-MHz operation)
Description amended
…The H8S/2210 and H8S/2210S has 4 kbytes of on-chip high-
speed static RAM.
Table amended
Product Class
H8S/2212 HD6432210
Group
HD6432210S
ROM Type
Masked ROM Version
Table amended
RAM Size
4 kbytes
RAM Address
H'FFE000 to H'FFEFBF
H'FFFFC0 to H'FFFFFF
Pin Name
PF3, PF0, P16,
P14
EMLE
TxD2
RxD2
I/O
Input
Input
Output
Input
Function
Sets this LSI's operating mode in programmer All
mode
Emulator enable
Serial transmit data output
Serial receive data input
HD64F2218,
HD64F2212,
HD64F2211
Table amended
Product Class
H8S/2218 Group HD6432217
H8S/2212 Group HD6432211
HD6432210, HD6432210S
ROM Size
64 kbytes
64 kbytes
32 kbytes
ROM Address (Modes 6 and 7)
H'000000 to H'00FFFF
H'000000 to H'00FFFF
H'000000 to H'007FFF
Description amended
The PLL circuit has the function of doubling or tripling the 16-
MHz or 24-MHz clock from the main oscillator to generate the
48-MHz USB operating clock.
.
When the PLL circuit is used, set the UCKS3 to UCKS0 bits of
UCTLR. For details, refer to section 14, Universal Serial Bus
(USB).
When the PLL circuit is not used, connect the PLVCC pin to Vcc
and the PLLVSS pin to the ground (Vss). Figure 19.9 shows
examples of external circuits peripheral to the PLL.
Figure added
Rev.6.00 Jun. 03, 2008 Page xi of xlviii
REJ09B0074-0600
11 Page | ||
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