PDF IS62WV6416BLL Data sheet ( Hoja de datos )

Número de pieza	IS62WV6416BLL
Descripción	ULTRA LOW POWER CMOS STATIC RAM
Fabricantes	Integrated Silicon Solution
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No Preview Available ! IS62WV6416ALL IS62WV6416BLL ISSI® 64K x 16 LOWwww.DataSheet4U.com VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM JUNE 2005 FEATURES • High-speed access time: 45ns, 55ns • CMOS low power operation: 30 mW (typical) operating 15 µW (typical) CMOS standby • TTL compatible interface levels • Single power supply 1.7V--2.2V VDD (62WV6416ALL) 2.5V--3.6V VDD (62WV6416BLL) • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature available • 2CS Option Available • Lead-free available DESCRIPTION The ISSI IS62WV6416ALL/ IS62WV6416BLL are high- speed, 1M bit static RAMs organized as 64K words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high- performance and low power consumption devices. When CS1 is HIGH (deselected) or when CS2 is LOW (deselected) or when CS1 is LOW, CS2 is HIGH and both LB and UB are HIGH, the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS62WV6416ALL and IS62WV6416BLL are packaged in the JEDEC standard 48-pin mini BGA (6mm x 8mm) and 44-Pin TSOP (TYPE II). FUNCTIONAL BLOCK DIAGRAM A0-A15 DECODER 64K x 16 MEMORY ARRAY VDD GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte CS2 CS1 OE WE UB LB I/O DATA CIRCUIT CONTROL CIRCUIT COLUMN I/O Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/03/05 1 1 page IS62WV6416ALL, IS62WV6416BLL AwwCw.TDaEtaSSTheeCt4OU.cNomDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load 62WV6416ALL (Unit) 0.4V to VDD-0.2V 5 ns VREF See Figures 1 and 2 62WV6416BLL (Unit) 0.4V to VDD-0.3V 5ns VREF See Figures 1 and 2 ISSI® AC TEST LOADS VTM R1 OUTPUT 30 pF Including jig and scope Figure 1 R2 VTM R1 OUTPUT 5 pF Including jig and scope Figure 2 R2 R1(Ω) R2(Ω) VREF VTM 1.7-2.2V 3070 3150 0.9V 1.8V 2.5V - 3.6V 3070 3150 1.5V 2.8V Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/03/05 5 5 Page IS62WV6416ALL, IS62WV6416BLL WwwRwI.DTaEtaSCheYetC4UL.cEomNO. 2 (WE Controlled: OE is HIGH During Write Cycle) ADDRESS OE CS1 CS2 WE LB, UB DOUT DIN tWC tSCS1 tSCS2 tAW t PWE tHA tSA tHZWE DATA UNDEFINED HIGH-Z tLZWE tSD tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle) ADDRESS OE CS1 CS2 WE LB, UB DOUT DIN tWC tSCS1 tSCS2 tAW t PWE tHA tSA tHZWE DATA UNDEFINED HIGH-Z tLZWE tSD tHD DATA-IN VALID Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/03/05 ISSI® 11 11 Page

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