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PDF ISL9109 Data sheet ( Hoja de datos )
| Número de pieza | ISL9109 | |
| Descripción | RF PA 1.5A DC/DC Regulator | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
September 29, 2008
ISL9109
FN6681.1
RF PA 1.5A DC/DC Regulator
ISL9109 is 1.6MHz synchronous step-down regulator with
integrated power switches capable of delivering 1.5A output
for powering RF Power Amplifiers in cellular phones. The
ISL9109 features a standby mode which allows for rapid
startup while prolonging battery life. The supply voltage
range is from 2.7V to 5.5V allowing the use of a single Li+
cell, three NiMH cells, or a regulated 5V input. 1.6MHz
pulse-width modulation (PWM) switching frequency allows
www.DataSheuesti4nUg.csommall external components. It has a flexible operation
mode selection of forced PWM mode and Skip (Low IQ)
mode with typical 22µA quiescent current for highest light
load efficiency to maximize battery life.
The ISL9109 integrates a pair of low ON-resistance
P-Channel and N-Channel MOSFETs to maximize efficiency
and minimize external component count.
When in standby, the ISL9109 band-gap reference is
powered. This assists in a rapid power-up when the EN pin
is asserted high. Other features include soft-start,
overcurrent protection, and thermal shutdown.
The ISL9109 is offered in 8 Ld 2mmx3mm DFN package
with 0.9mm typical height. The complete converter can
occupy less than 1cm2 area.
Ordering Information
PART
NUMBER
(Note)
TEMP.
PART RANGE
MARKING (°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL9109IRZ* 109
-40 to +85 8 Ld 2x3 DFN L8.2x3
*Add “-T” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Integrated Synchronous Buck Regulator with up to 95%
Efficiency
• 2.7V to 5.5V Supply Voltage
• 1.5A Output Current
• 4.3µA Quiescent Supply Current in Standby Mode
• 22µA Quiescent Supply Current in Skip (Low IQ) Mode
• 3% Output Accuracy Over Temperature/Load/Line
• Selectable Forced PWM Mode or Skip Mode
• Less Than 1µA Logic Controlled Shutdown Current
• 100% Maximum Duty Cycle for Lowest Dropout
• Soft-Start
• Peak Current Limiting, Short Circuit Protection
• Over-Temperature Protection
• 8 Ld 2mmx3mm DFN
• Pb-Free (RoHS Compliant)
Applications
• Single Li-Ion Battery-Powered Equipment
• RF Power Amplifier
• CPU Power
• PDAs and Palmtops
Pinout
ISL9109
(8 LD 2X3 DFN)
TOP VIEW
VIN 1
EN 2
N/C 3
MODE 4
8 SW
7 GND
6 FB
5 STBY
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL9109
Typical Operating Performance (Continued)
VOUT
5V/DIV
SW
5V/DIV
EN
2V/DIV
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200µs/DIV
FIGURE 9. SOFT-START (VIN = 4.2V, VOUT = 1.6V,
STBY = 0V, IOUT = 500mA)
VOUT
5V/DIV
SW
5V/DIV
EN
2V/DIV
10µs/DIV
FIGURE 10. SOFT-START (VIN = 4.2V, VOUT = 1.6V,
STBY = VIN, IOUT = 500mA)
2V/DIV
VSW
20mV/DIV
200mA/DIV
VOUT (AC COUPLED)
IL
1µs/DIV
FIGURE 11. STEADY-STATE IN SKIP MODE (VIN = 5.0V,
VOUT = 1.8V, IOUT = 35mA)
2V/DIV
50mV/DIV
VSW
VOUT (AC COUPLED)
200mA/DIV
IL
4µs/DIV
FIGURE 13. STEADY-STATE IN SKIP MODE (VIN = 5.0V,
VOUT = 3.3V, IOUT = 35mA)
5
2V/DIV
20mV/DIV
VSW
1A/DIV
VOUT (AC COUPLED)
IL
1µs/DIV
FIGURE 12. STEADY-STATE IN PWM MODE (VIN = 5.0V,
VOUT = 1.8V, IOUT = 1.2A)
2V/DIV
20mV/DIV
VSW
VOUT (AC COUPLED)
1A/DIV
IL
1µs/DIV
FIGURE 14. STEADY-STATE IN PWM MODE (VIN = 5.0V,
VOUT = 3.3V, IOUT = 1.2A)
FN6681.1
September 29, 2008
5 Page 
Applications Information
VIN
STBY
EN
BAND-GAP
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VOUT
ISL9109
400µS~1ms
1ms
BAND-GAP WAKE-UP WAIT
30µs
25µs
VOUT
BIAS UP SOFT_START
25µs
30µs
BAND-GAP OFF @
BIAS UP VOUT SOFT-START EN=STBY=Low
FIGURE 23. TIMING DIAGRAM
400~800µs
BAND-GAP
WAKE-UP
25µs
400~800µs
BIAS UP VOUT SOFT-START
Inductor and Output Capacitor Selection
To achieve better steady state and transient response, typically
a 2.2µH inductor can be used. The peak-to-peak inductor
current ripple can be expressed as follows in Equation 1:
VO
•
⎛
⎜
⎝
1
–
V-V----I-O-N--⎠⎟⎞
ΔI
=
--------------------------------------
L • fS
(EQ. 1)
In Equation 1, usually the typical values can be used but to
have a more conservative estimation; the inductance should
consider the value with worst case tolerance. For switching
frequency fS, the minimum fS from the “Electrical
Specifications” table on page 2 can be used.
To select the inductor, its saturation current rating should be at
least higher than the sum of the maximum output current and
half of the delta calculated from Equation 1. Another more
conservative approach is to select the inductor with the current
rating higher than the P-Channel MOSFET peak current limit.
Another consideration is the inductor DC resistance since it
directly affects the efficiency of the converter. Ideally, the
inductor with the lower DC resistance should be considered
to achieve higher efficiency.
Inductor specifications could be different from different
manufacturers so please check with each manufacturer if
additional information is needed.
For the output capacitor, a ceramic capacitor can be used
because of the low ESR values, which helps to minimize the
output voltage ripple. A typical value of 10µF/6.3V ceramic
capacitor should be enough for most of the applications and
the capacitor should be X5R or X7R.
Input Capacitor Selection
The main function for the input capacitor is to provide
decoupling of the parasitic inductance and to provide filtering
function to prevent the switching current from flowing back to
the battery rail. A 10µF/6.3V ceramic capacitor (X5R or X7R)
is a good starting point for the input capacitor selection.
Output Voltage Setting Resistor Selection
The voltage divider resistors, R1 and R2, (as shown in
Figure 19), set the desired output voltage value. The output
voltage can be calculated using Equation 2:
VO
=
VFB
•
⎛
⎜
⎝
1
+
RR-----12- ⎠⎟⎞
(EQ. 2)
Where VFB is the feedback voltage (typically it is 0.8V). The
current flowing through the voltage divider resistors can be
calculated as VO/(R1 + R2), so larger resistance is desirable
to minimize this current. On the other hand, the FB pin has
leakage current that will cause error in the output voltage
setting. The leakage current has a typical value of 0.1µA. To
minimize the accuracy impact on the output voltage, select
the R2 no larger than 200kΩ.
C3 (shown in Figure 19) is highly recommended to be added
for improving stability, and achieving better transient
response. C3 should be 120pF or less to meet the 60µs
maximum soft-startup time when STBY = 1.
Table 1 provides the recommended component values for
some output voltage options.
11 FN6681.1
September 29, 2008
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ISL9109.PDF ] | |
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