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PDF IR3086APBF Data sheet ( Hoja de datos )
| Número de pieza | IR3086APBF | |
| Descripción | XPHASETM PHASE IC | |
| Fabricantes | International Rectifier | |
| Logotipo |  |
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DATA SHEET NO. PD94711
IR3086APbF
XPHASETM PHASE IC WITH OVP, FAULT AND OVERTEMP DETECT
DESCRIPTION
The IR3086APbF Phase IC combined with an IR XPhaseTM Control IC provides a full featured and flexible
way to implement power solutions for the latest high performance CPUs and ASICs. The “Control” IC
provides overall system control and interfaces with any number of “Phase” ICs which each drive and
monitor a single phase of a multiphase converter. The XPhaseTM architecture results in a power supply that
www.DataSheet4U.com is smaller, less expensive, and easier to design while providing higher efficiency than conventional
approaches.
FEATURES
• 2.5A Average Gate Drive Current
• Loss-Less Inductor Current Sense
• Internal Inductor DCR Temperature Compensation
• Programmable Phase Delay
• Programmable Feed-Forward Voltage Mode PWM Ramp
• Sub 100ns Minimum Pulse Width supports 1MHz per-phase operation
• Current Sense Amplifier drives a single wire Average Current Share Bus
• Current Share Amplifier reduces PWM Ramp slope to ensure sharing between phases
• Body BrakingTM disables Synchronous MOSFET for improved transient response and prevents negative
output voltage at converter turn-off
• OVP comparator with 150ns response
• Phase Fault Detection
• Programmable Phase Over-Temperature Detection
• Small thermally enhanced 20L MLPQ package
PACKAGE PINOUT
Page 1 of 33
1 RMPIN+
VCCH 15
2 RMPIN- IR3086APbF GATEH 14
3 HOTSET PHASE IC PGND 13
4 VRHOT
GATEL 12
5 ISHARE
VCCL 11
1/28/2005
1 page  
IR3086APbF
PARAMETER
General
VCC Supply Current
VCCL Supply Current
VCCH Supply Current
BIASIN Bias Current
DACIN Bias Current
TEST CONDITION
6V ≤ VCCH ≤ 14V
14V ≤ VCCH ≤ 25V
www.DataSheeNt4oUt.ceo1m: Guaranteed by design, but not tested in production
MIN TYP MAX UNIT
10 14 mA
2.5 5 mA
5.5 8 mA
6.5 10 mA
-5 -2.5 2
µA
-2 -0.5
1
µA
PIN DESCRIPTION
PIN#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN SYMBOL
RMPIN+
RMPIN-
HOTSET
VRHOT
ISHARE
SCOMP
EAIN
PWMRMP
LGND
VCC
VCCL
GATEL
PGND
GATEH
VCCH
CSIN+
CSIN-
PHSFLT
DACIN
BIASIN
PIN DESCRIPTION
Non-inverting input to Ramp Comparator
Inverting input to Ramp Comparator
Inverting input to VRHOT comparator. Connect resistor divider from VBIAS to LGND
to program VRHOT threshold. Diode or thermistor may be substituted for lower
resistor for enhanced/remote temperature sensing.
Open Collector output of the VRHOT comparator which drives low if IC junction
temperature exceeds the user programmable limit. Connect external pull-up.
Output of the Current Sense Amplifier and input to the Share Adjust Error Amplifier.
Voltage on this pin is equal to V(DACIN) + 34 * [V(CSIN+) – V(CSIN-)]. Connecting
ISHARE pins together creates a Share Bus enabling current sharing between Phase
ICs. The Share bus is also used by the Control IC for voltage positioning and Over-
Current protection.
Compensation for the Current Share control loop. Connect a capacitor to ground to
set the control loop’s bandwidth.
PWM comparator input from the error amplifier of Control IC. Both Gate Driver
outputs drive low if the voltage on this pin is less than 91% of V(DACIN).
PWM comparator ramp input. Connect a resistor from this pin to the converter input
voltage and a capacitor to LGND to program the PWM ramp.
Signal ground and IC substrate connection
Power for internal circuitry
Power for Low-Side Gate Driver
Low-Side Gate Driver Output and input to GATEH non-overlap comparator
Return for Gate Drivers
High-Side Gate Driver Output and input to GATEL non-overlap comparator
Power for High-Side Gate Driver
Non-inverting input to the Current Sense Amplifier
Inverting input to the Current Sense Amplifier and also non-inverting input to the OVP
comparator
Open Collector output of the Phase Fault comparator. Drives low if Phase current is
unable to match the level of the SHARE bus due to an external fault. Connect
external pull-up.
Reference voltage input from the Control IC and inverting input to the OVP
comparator. Current sensing and PWM operation referenced to this pin.
System reference voltage for internal circuitry
Page 5 of 33
1/28/2005
5 Page 
IR3086APbF
IR3086APbF THEORY OF OPERATION
Block Diagram
The Block diagram of the IR3086APbF is shown in Fig. 6, and specific features are discussed in the following
sections.
RMPIN+
RMPIN-
www.DataSheet4U.comEAIN
BIASIN
PWMRMP
SCOMP
ISHARE
LGND
VRHOT
HOTSET
RAMP
COMPARATOR
CLOCK
PULSE
GENERATOR
PWM
COMPARATOR
PWM
LATCH
S
RESET
DOMINANT
SYSTEM
BIRAESFIENRENCE
VOLTAGE
-
+
ENABLE
R
ENABLE
RAMP
SLOPE VDAC
ADJUST
RAMP
DISCHARGE
CLAMP
BODY BRAKING
COMPARATOR
-
GATE
+
NON-OVERLAP
COMPARATORS
2V
SHARE
ADJUST
SCOMEPRROR
AMP
X
0.91
+
10K 20mV
-
VRHOT
COMPARATOR
+
VDAC +
VDAC
+ VOLTAGE
PROPORTIONAL
TO ABSOLUTE
- TEMPERATURE
CURRENT
SENSE
AMP
X34
-
OVP
+
COMPARATOR
+
125mV
-
INTERNAL
CIRCUVICTC
BIAS
FAULT
COMPARATOR
VCCH
GATEH
VCCL
GATEL
PGND
VCC
DACIN
CSIN+
CSIN-
PHSFLT
Figure 6 – IR3086APbF Block Diagram
Tri-State Gate Drivers
The gate drivers can deliver up to 3A peak current. An adaptive non-overlap circuit monitors the voltage on the
GATEH and GATEL pins to prevent MOSFET shoot-through current while minimizing body diode conduction.
An Enable signal is provided by the Control IC to the Phase IC without the addition of a dedicated signal line. The
Error Amplifier output of the Control IC drives low in response to any fault condition such as input under voltage or
output overload. The IR3086APbF Body BrakingTM comparator detects this and drives both gate outputs low. This
tri-state operation prevents negative inductor current and negative output voltage during power-down.
The Gate Drivers revert to a high impedance “off” state if VCCL and VCCH supply voltages are below the normal
operating range. An 80kΩ resistor is connected across the GATEH/GATEL and PGND pins to prevent the
GATEH/GATEL voltage from rising due to leakage or other causes under these conditions.
Over Voltage Protection (OVP)
The IR3086APbF includes over-voltage protection that turns on the low side MOSFET to protect the load in the
event of a shorted high-side MOSFET or connection of the converter output to an excessive output voltage. A
comparator monitors the voltage at the CSIN- pin which is usually connected directly to the converter output. If the
voltage exceeds the DACIN voltage plus 125mV typical (100mV minimum and 160mV maximum) the GATEL pin
drives high. The OVP circuit overrides the normal PWM operation and will fully turn-on the low side MOSFET within
approximately 150ns. The low side MOSFET will remain ON until the over-voltage condition ceases.
Page 11 of 33
1/28/2005
11 Page | ||
| Páginas | Total 33 Páginas | |
| PDF Descargar | [ Datasheet IR3086APBF.PDF ] | |
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