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PDF HV230 Data sheet ( Hoja de datos )
| Número de pieza | HV230 | |
| Descripción | (HV230 / HV232) Low Charge Injection 8-Channel High Voltage Analog Switches | |
| Fabricantes | Supertex | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HV230 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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HV230/HV232
Low Charge Injection 8-Channel High Voltage
Analog Switches with Bleed Resistors
Features
► HVCMOS® technology for high performance
► Very low quiescent power dissipation – 10µA
► Output On-resistance typically 22Ω
► Integrated bleed resistors on the outputs
► Low parasitic capacitances
www.Data►SheeDt4CU.ctoom10MHz analog signal frequency
► -60dB typical output off isolation at 5.0MHz
► CMOS logic circuitry for low power
► Excellent noise immunity
► On-chip shift register, latch and clear logic circuitry
► Flexible high voltage supplies
Applications
► Medical ultrasound imaging
► Piezoelectric transducer drivers
General Description
The Supertex HV230 and HV232 are low charge injection 8-
channel high-voltage analog switch integrated circuits(ICs)
with bleed resistors. These devices can be used in applications
requiring high voltage switching controlled by low voltage
control signals, such as ultrasound imaging and printers. The
bleed resistors eliminate voltage built up on capacitive loads
such as piezoelectric transducers. Input data is shifted into
an 8-bit shift register which can then be retained in an 8-bit
latch. To reduce any possible clock feed-through noise, Latch
Enable Bar (LE) should be left high until all bits are clocked
in. Using HVCMOS technology, this switch combines high
voltage bilateral DMOS switches and low power CMOS logic
to provide efficient control of high voltage analog signals.
These ICs are suitable for various combinations of high voltage
supplies, e.g., VPP/VNN: +50V/–150V, or +100V/–100V.
Block Diagram
DIN
CLK
8-Bit
Shift
Register
DOUT
Latches
D
LE
CL
Level
Shifters
Output
Switches
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
SW0
SW1
SW2
SW3
SW4
SW5
SW6
SW7
VDD LE CL
VNN VPP
RGND
1 page  
HV230/HV232
Truth Table
D0 D1 D2 D3 D4 D5 D6 D7 LE CL SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L L L OFF
H L L ON
L
LL
OFF
H
LL
ON
L
LL
OFF
H
LL
ON
L
LL
OFF
H
LL
ON
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L
H
LL
LL
OFF
ON
L LL
OFF
H LL
ON
L LL
OFF
H LL
ON
L LL
OFF
HLL
ON
X XXX X XXX H L
HOLD PREVIOUS STATE
X X X X X X X X X H OFF OFF OFF OFF OFF OFF OFF OFF
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L to H transition CLK.
3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is
low the shift register data flows through the latch.
4. DOUT is high when data in shift register 7 is high.
5. Shift register clocking has no effect on the switch states if LE is H.
6. The clear input overrides all other inputs.
Logic Timing Waveforms
DN + 1
DATA
IN
50%
DN
50%
D
N-1
LE
CLOCK
DATA
OUT
VOUT OFF
(TYP)
ON
50%
t SU
50%
t WLE
t SD
50%
th
t DD
50%
t OFF
90%
50%
t ON
10%
CLR
50%
t WCL
50%
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HV230.PDF ] | |
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