DataSheet.jp

HM514280AL の電気的特性と機能

HM514280ALのメーカーはRenesas Technologyです、この部品の機能は「18-bit Dynamic Random Access Memory」です。


製品の詳細 ( Datasheet PDF )

部品番号 HM514280AL
部品説明 18-bit Dynamic Random Access Memory
メーカ Renesas Technology
ロゴ Renesas Technology ロゴ 




このページの下部にプレビューとHM514280ALダウンロード(pdfファイル)リンクがあります。

Total 22 pages

No Preview Available !

HM514280AL Datasheet, HM514280AL PDF,ピン配置, 機能
HM514280A/AL Series
262,144-word × 18-bit Dynamic Random Access Memory
The Hitachi HM514280A/AL are CMOS dynamic
RAM organized as 262,144-word × 18-bit.
HM514280A/AL have realized higher density,
higher performance and various functions by
employing 0.8 µm CMOS process technology and
some new CMOS circuit design technologies. The
HM514280A/AL offer fast page mode as a high
speed access mode.
Multiplexed address input permits the
HM514280A/AL to be packaged in standard 400-
www.DataShmeielt44U0.c-pomin plastic SOJ, standard 475-mil 40-pin
plastic ZIP and standard 400-mil 44-pin plastic
TSOPII.
Features
• Single 5 V (±10%)
• High speed
– Access time: 70 ns/80 ns (max)
• Low power dissipation
– Active mode: 825 mW/770 mW (max)
– Standby mode: 11 mW (max)
1.1 mW (max) (L-version)
• Fast page mode capability
• 512 refresh cycles: 8 ms
128 ms (L-version)
• 2 CAS byte control
• 2 variations of refresh
RAS -only refresh
CAS -before-RAS refresh
• Battery back up operation (L-version)
Ordering Information
Access
Type No.
time
Package
——————————————————————–
HM514280AJ-7
70 ns
400-mil 40-pin
HM514280AJ-8
80 ns
plastic SOJ
(CP-40D)
——————————————————————–
HM514280AZ-7
70 ns
475-mil 40-pin
HM514280AZ-8
80 ns
plastic ZIP
(ZP-40)
——————————————————————–
HM514280ATT-7
70 ns
400-mil 44-pin
HM514280ATT-8
80 ns
plastic TSOPII
(TTP-44/40DB)
——————————————————————–
HM514280ALJ-7
70 ns
400 mil 40-pin
HM514280ALJ-8
80 ns
plastic SOJ
(CP-40D)
——————————————————————–
HM514280ALZ-7
70 ns
475-mil 40-pin
HM514280ALZ-8
80 ns
plastic ZIP
(ZP-40)
——————————————————————–
HM514280ALTT-7
70 ns
400 mil 44-pin
HM514280ALTT-8
80 ns
plastic TSOPII
(TTP-44/40DB)
——————————————————————–
1

1 Page





HM514280AL pdf, ピン配列
HM514280A/AL Series
Block Diagram
HM514280A/AL Series
www.DataSheet4U.com
Row
Decoder
Row Row
Decoder Decoder
Row
Decoder
Selector
Selector
Row
Decoder
Row Row
Decoder Decoder
Row
Decoder
Selector
Selector
I/O4
I/O4
Buffer
I/O5
I/O5
Buffer
I/O6
I/O6
Buffer
I/O7
I/O7
Buffer
I/O8
I/O8
Buffer
WE
RAS
I/O3 I/O2
I/O3 I/O2
Buffer Buffer
Address
I/O1 I/O0
I/O1 I/O0
Buffer Buffer
I/O17 I/O16
I/O17 I/O16
Buffer Buffer
Peripheral Circuit
A0,A1,A2,A3
Address A4,A5
I/O15
I/O15
Buffer
I/O14
I/O14
Buffer
I/O13
Buffer
I/O13
I/O12
Buffer
I/O12
I/O11
Buffer
I/O11
I/O10
Buffer
I/O10
I/O9
Buffer I/O9
A6,A7,A8
LCAS
UCAS
OE
Selector
Selector
Row
Decoder
Row Row
Decoder Decoder
Row
Decoder
Selector
Selector
Row
Decoder
Row Row
Decoder Decoder
Row
Decoder
3


3Pages


HM514280AL 電子部品, 半導体
HM514280A/AL Series
HM514280A/AL Series
DC Characteristics (Ta = 0 to +70°C, VCC = 5 V ± 10%, VSS = 0 V) (cont)
HM514280A/AL
————————————–
-7 -8
—————— ——————
Parameter
Symbol Min Max Min Max Unit Test conditions
Notes
———————————————————————————————————————————————–
Fast page mode
current
ICC7
— 130 — 120 mA tPC = min
1, 3
———————————————————————————————————————————————–
Battery back up
current
ICC10
— 300 — 300 µA Standby: CMOS interface 4
Dout = High-Z
(Standby with
CBR refresh: tRC = 250 µs
CBR refresh)
www.DataSh(Le-evt4eUrs.cioonm)
tRAS < 1 µs, LCAS,
UCAS = VIL, WE, OE = VIH
———————————————————————————————————————————————–
Input leakage current ILI
–10 10 –10 10 µA 0 V < Vin < 6.5 V
———————————————————————————————————————————————–
Output leakage current ILO
–10 10 –10 10 µA 0 V < Vout < 6.5 V
Dout = disable
———————————————————————————————————————————————–
Output high voltage VOH
2.4 VCC 2.4 VCC V
High Iout = –5.0 mA
———————————————————————————————————————————————–
Output low voltage
VOL
0 0.4 0 0.4 V Low Iout = 4.2 mA
———————————————————————————————————————————————–
Notes: 1. ICC depends on output load condition when the device is selected. ICC max is specified at the
output open condition.
2. Address can be changed once or less while RAS = VIL.
3. Address can be changed once or less while LCAS and UCAS = VIH.
4. VIH > VCC – 0.2 V, 0 < VIL < 0.2 V, Address can be changed once or less while RAS = VIL.
5. All the VCC pins shall be supplied with the same voltage. And all the VSS pins shall be
supplied with the same voltage.
Capacitance (Ta = 25°C, VCC = 5 V ± 10%)
Parameter
Symbol
Typ
Max Unit Notes
———————————————————————————————————————————————–
Input capacitance (Address)
CI1
—5
pF 1
———————————————————————————————————————————————–
Input capacitance (Clocks)
CI2
—7
pF 1
———————————————————————————————————————————————–
Output capacitance (Data-in, Data-out)
CI/O
— 10 pF 1, 2
———————————————————————————————————————————————–
Notes: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. LCAS and UCAS = VIH to disable Dout
6

6 Page



ページ 合計 : 22 ページ
 
PDF
ダウンロード
[ HM514280AL データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
HM514280A

18-bit Dynamic Random Access Memory

Renesas Technology
Renesas Technology
HM514280AL

18-bit Dynamic Random Access Memory

Renesas Technology
Renesas Technology


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap