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UC1617S PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 UC1617S
部品説明 128 X 128 STN Controller Driver
メーカ Ultra Chip
ロゴ Ultra Chip ロゴ 



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UC1617S Datasheet, UC1617S PDF,ピン配置, 機能
UC1617S
128x128 STN Controller-Driver
UC1617s
Single-Chip, Ultra-Low Power
128COM x 128SEG Matrix
Passive LCD Controller-Driver
www.DataSheet4U.com INTRODUCTION
UC1617s is an advanced high-voltage mixed-
signal CMOS IC, especially designed for the
display needs of low power hand-held devices.
This chip employs UltraChip’s unique DCC
(Direct Capacitor Coupling) driver architecture
and FRM (Frame Rate Modulation) gray-shade
modulation scheme to achieve near crosstalk
free images, with well balanced gray shades.
In addition to low power COM and SEG drivers,
UC1617s contains all necessary circuits for high-
V LCD power supply, bias voltage generation,
temperature compensation, timing generation
and graphics data memory.
Advanced circuit design techniques are
employed to minimize external component counts
and reduce connector size while achieving
extremely low power consumption.
MAIN APPLICATIONS
x Cellular Phones and other battery operated
palm top devices or portable Instruments
FEATURE HIGHLIGHTS
x Single chip controller-driver for 128x128
matrix STN LCD with 4 gray shades and
B/W Mode.
x A software-readable ID pin and an MTP
programmable ID bit to support configurable
vender identification.
x Partial scroll function and programmable
data update window to support flexible
manipulation of screen data.
x Support both row ordered and page_c
(page column) ordered display buffer RAM
access.
x Support industry standard 2-wire, 3-wire,
4-wire serial bus (I2C, S8, S9) and
8-bit parallel bus (8080 or 6800).
x Special driver structure and gray shade
modulation scheme. Consistent low power
consumption under all display patterns.
x Fully programmable Mux Rate, partial
display window, Bias Ratio and Line Rate
allow many flexible power management
options.
x Four software programmable frame rates
up to 201Hz. Support the use of fast Liquid
Crystal material for speedy LCD response.
x Software programmable 4 temperature
compensation coefficients.
x On-chip Power-ON Reset and Software
RESET command, make RST pin optional.
x Self-configuring 9x charge pump with on-
chip pumping capacitors. Only 3 external
capacitors are required to operate.
x Flexible data addressing/mapping schemes
to support wide ranges of software models
and LCD layout placements.
x Very low pin count (9~10 pins with S8, S9,
or I2C) allows exceptional image quality in
COG format on conventional ITO glass.
x Many on-chip and I/O pad layout features to
support optimized COG applications.
x VDD (digital) range (Typ.) : 1.8V ~ 3.3V
VDD (analog) range (Typ.) : 2.7V ~ 3.3V
LCD VOP range:
6.0V ~ 15V
x Available MTP trimming support precise
LCD contrast matching.
x Available in gold bump dies
Bump pitch:
26.5 PM
Bump gap:
12 PM
Bump surface: 2,001 PM2
Revision A_1.0
3

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