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U5198NL PDF Data sheet ( 特性 )

部品番号 U5198NL
部品説明 (U5196NL - U5199NL) Monolithic N-channel JFET Duals
メーカ Vishay Intertechnology
ロゴ Vishay Intertechnology ロゴ 



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U5198NL Datasheet, U5198NL PDF,ピン配置, 機能
New Product
SST/U5196NL Series
Vishay Siliconix
Monolithic N-Channel JFET Duals
SST5198NL
SST5199NL
U5196NL
U5197NL
U5198NL
U5199NL
PRODUCT SUMMARY
Part Number
U5196NL
U5197NL
www.DataSheet4U.com
SST/U5198NL
SST/U5199NL
VGS(off) (V)
-0.7 to -4
-0.7 to -4
-0.7 to -4
-0.7 to -4
V(BR)GSS Min (V)
- 50
- 50
- 50
- 50
gfs Min (mS)
1
1
1
1
IG Max (pA)
- 15
- 15
- 15
- 15
jVGS1 - VGS2j Max (mV)
5
5
10
15
FEATURES
D Anti Latchup Capability
D Monolithic Design
D High Slew Rate
D Low Offset/Drift Voltage
D Low Gate Leakage: 5 pA
D Low Noise
D High CMRR: 100 dB
BENEFITS
D External Substrate Bias—Avoids Latchup
D Tight Differential Match vs. Current
D Improved Op Amp Speed, Settling Time Accuracy
D Minimum Input Error/Trimming Requirement
D Insignificant Signal Loss/Error Voltage
D High System Sensitivity
D Minimum Error with Large Input Signal
APPLICATIONS
D Wideband Differential Amps
D High-Speed, Temp-Compensated,
Single-Ended Input Amps
D High Speed Comparators
D Impedance Converters
DESCRIPTION
The SST/U5196NL series of JFET duals are designed for
high-performance differential amplification for a wide range of
precision test instrumentation applications. This series
features tightly matched specs, low gate leakage for accuracy,
and wide dynamic range with IG guaranteed at VDG = 20 V.
Pins 4 and 8 of the SST series and pin 4 on the U series part
numbers enable the substrate to be connected to a positive,
external bias (VDD) to avoid latchup.
Narrow Body SOIC
The U series in the hermetically-sealed TO-78 package is
available with full military processing. The SST series SO-8
package provides ease of manufacturing and the symmetrical
pinout prevents improper orientation. The SO-8 package is
available with tape-and-reel options for compatibility with
automatic assembly methods.
For similar products see the low-noise SST/U401NL series
and the low-leakage U421NL/423NL data sheets.
TO-78
S1
D1
G1
SUBSTRATE
1
2
3
4
8 SUBSTRATE
7 G2
6 D2
5 S2
S1
1
D1 2
G2
7
6 D2
Top View
Marking Codes:
SST5198NL - 5198NL
SST5199NL - 5199NL
3
G1
5
4 S2
CASE, SUBSTRATE
Top View
U5196NL, U5198NL
U5197NL, U5199NL
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Lead Temperature (1/16” from case for 10 sec.) . . . . . . . . . . . . . . . . . . 300 _C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 200_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to 150_C
Document Number: 72156
S-03468—Rev. B, 11-Mar-03
Power Dissipation :
Per Sidea . . . . . . . . . . . . . . . . . . . . . . . . 250 mW
Totalb . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
Notes
a. Derate 2 mW/_C above 85_C
b. Derate 4 mW/_C above 85_C
www.vishay.com
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部品番号部品説明メーカ
U5198NL

(U5196NL - U5199NL) Monolithic N-channel JFET Duals

Vishay Intertechnology
Vishay Intertechnology

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