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PDF PL611S-27 Data sheet ( Hoja de datos )
| Número de pieza | PL611S-27 | |
| Descripción | PicoPLLTM Programmable Clock | |
| Fabricantes | PhaseLink Corporation | |
| Logotipo |  |
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P(Preliminary) L611s-27
1.8V to 3.3V PicoPLLTM Programmable Clock
FEATURES
• Advanced One Time Programmable (OTP) PLL design
• Programmable PLL or direct oscillation operation
• Very low Jitter and Phase Noise (30-70ps Pk-Pk typical)
• Output Frequency up to
o 65MHz @ 1.8V operation
o 9/MHz @ 2.5V operation
o 125MHz @ 3.3V operation
• Reference Input Frequency: 1MHz to 200MHz
www.DataShe•et4UA.ccocmepts >0.1V reference signal input voltage
• Low current consumption, <10µA when PDB is
activated
• One programmable I/O pin can be configured as
Output Enable (OE), Frequency Switching
(FSEL), or Power Down (PDB) input.
• Disabled outputs programmable as HiZ or Active Low.
• Single 1.8V, 2.5V, or 3.3V ± 10% power supply
• Operating temperature range from 0°C to 70°C
• Available in 6-pin SOT23 & DFN GREEN/RoHS
Compliant packages
DESCRIPTION
The PL611s-27 is a general purpose frequency
synthesizer and a member of PhaseLink’s PicoPLL
product family. Designed to fit in a small 6-pin DFN,
or 6-pin SOT package for high performance
applications, the PL611s-27 offers very low phase
noise, jitter, and power consumption, while offering 2
clock outputs. The Frequency Switching (FSEL)
capability of PL611s-27 allows for programming two
sets of frequencies, while the power down feature of
PL611s-27, when activated, allows the IC to
consume less than 10µA of power. PL611s-27’s
programming flexibility allows generating any output
using a Reference input signal.
PACKAGE PIN CONFIGURATION
FIN 1
CLK1 2
GND 3
6 OE, PDB, FSEL
5 VDD
4 CLK0
CLK1
GND
FIN
1
2
3
6 CLK0
5 VDD
4 OE, PDB, FSEL
DFN-6L
(2.0mmx1.3mmx0.6mm)
SOT23-6L
(3.0mmx3.0mmx1.35mm)
BLOCK DIAGRAM
FIN
Fref R-counter
(8-Bit)
M-counter
(11-Bit)
Phase
Detector
Fvco=Fref* (2 * M /R)
Charge
Pump
Loop
Filter
VCO
P-counter
(5-Bit) Fout=FVCO/(2*P)
CLK1
CLK0
Programmable Function
Programming
Logic
OE, PDB,
FSEL
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 2/25/07 Page 1
1 page  
P(Preliminary) L611s-27
1.8V to 3.3V PicoPLLTM Programmable Clock
DC SPECIFICATIONS
PARAMETERS
SYMBOL
CONDITIONS
Supply Current, Dynamic, with
Loaded CMOS Outputs
Supply Current, Dynamic, with
Loaded CMOS Outputs
Supply Current, Dynamic with
Loaded CMOS Outputs
www.DataSheeSt4tUa.ncdomBy Current, with Loaded
Outputs
Operating Voltage
IDD
@ VDD =3.3V, 27MHz,
load=15pF
IDD
@ VDD =2.5V, 27MHz,
load=15pF
IDD
@ VDD =1.8V, 27MHz,
load=15pF
IDD When PDB=0
VDD
Output Low Voltage
VOL IOL = +4mA Standard Drive
Output High Voltage
VOH IOH = -4mA Standard Drive
Output Current, Low Drive
IOSD VOL = 0.4V, VOH = 2.4V
Output Current, Standard Drive
IOSD VOL = 0.4V, VOH = 2.4V
Output Current, High Drive
IOHD VOL = 0.4V, VOH = 2.4V
* Note: Please contact PhaseLink, if super low-power is required.
MIN.
1.62
VDD – 0.4
4
8
16
TYP.
5.5
3.8
1.8*
MAX.
<10
3.63
0.4
UNITS
mA
mA
mA
µA
V
V
V
mA
mA
mA
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 2/25/07 Page 5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet PL611S-27.PDF ] | |
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