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PDF UPA1742TP Data sheet ( Hoja de datos )
| Número de pieza | UPA1742TP | |
| Descripción | SWITCHING N-CHANNEL POWER MOSFET | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1742TP
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The µPA1742TP is N-channel MOS FET device that
features a low on-state resistance and excellent switching
characteristics, and designed for high voltage applications
www.DataSheet4U.csoumch as DC/DC converter.
FEATURES
• High voltage: VDSS = 250 V
• Gate voltage rating: ±30 V
• Low on-state resistance
RDS(on) = 0.55 Ω MAX. (VGS = 10 V, ID = 3.5 A)
• Low input capacitance
Ciss = 460 pF TYP. (VDS = 10 V, VGS = 0 V)
• Built-in gate protection diode
• Small and surface mount package (Power HSOP8)
ORDERING INFORMATION
PART NUMBER
µPA1742TP
PACKAGE
Power HSOP8
PACKAGE DRAWING (Unit: mm)
85
1, 2, 3
; Source
4 ; Gate
5, 6, 7, 8, 9 ; Drain
14
5.2
+0.17
–0.2
0.8 ±0.2
S
6.0 ±0.3
4.4 ±0.15
1.27 TYP.
0.40
+0.10
–0.05
14
0.12 M
2.0 ±0.2
9
4.1 MAX.
85
0.10 S
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise noted. All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
VDSS 250 V
VGSS ±30 V
EQUIVALENT CIRCUIT
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
ID(DC)
ID(pulse)
±7.0
±21
A
A
Drain
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C) Note2
PT1
PT2
24 W
1.0 W
Gate
Body
Diode
Channel Temperature
Tch 150 °C
Storage Temperature
Tstg −55 to +150 °C
Single Avalanche Current Note3
IAS 7.0 A
Single Avalanche Energy Note3
EAS 4.9 mJ
Repetitive Avalanche Current Note4
IAR 7.0 A
Repetitive Pulse Avalanche Energy Note4
EAR
4.9 mJ
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on glass epoxy board of 1 inch x 1 inch x 0.8 mm
3. Starting Tch = 25°C, VDD = 125 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V
4. Tch(peak) ≤ 150°C, L = 100 µH
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G16325EJ1V0DS00 (1st edition)
Date Published April 2003 NS CP(K)
Printed in Japan
2002
1 page  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
1.5
1.25
VGS = 10 V
Pulsed
1 ID = 7.0 A
0.75
3.5 A
0.5
0.25
www.DataSheet4U.com
0
-50 -25 0 25 50 75 100 125 150 175
Tch - Channel Temperature - °C
SWITCHING CHARACTERISTICS
100
VDD = 125 V
VGS = 10 V
RG = 0 Ω
td(off)
tf
10 td(on)
tr
1
0.1 1 10 100
ID - Drain Current - A
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100
Pulsed
VGS = 0 V
10
1
0.1
0.01
0
0.25 0.5 0.75 1 1.25 1.5
VF(S-D) - Source to Drain Voltage - V
µ PA1742TP
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
1000
C iss
100
C oss
10
C rss
VGS = 0 V
f = 1 MHz
1
0.1 1
10 100
VDS - Drain to Source Voltage - V
1000
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
250 15
ID = 7.0 A
200
VDD = 200 V
125 V
150 62.5 V
12
9
100 6
VGS
50 3
VDS
00
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
QG - Gate Charge - nC
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
1000
di/dt = 100 A/µs
VGS = 0 V
100
10
1
0.1 1 10 100
IF - Diode Forward Current - A
Data Sheet G16325EJ1V0DS
5
5 Page | ||
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| PDF Descargar | [ Datasheet UPA1742TP.PDF ] | |
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