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PDF UPA1740TP Data sheet ( Hoja de datos )
| Número de pieza | UPA1740TP | |
| Descripción | SWITCHING N-CHANNEL POWER MOSFET | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µPA1740TP
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The µPA1740TP is N-channel MOS FET device that features a
low on-state resistance and excellent swiching characteristics, and
www.DataSheet4Ud.ecsoimgned for high voltage applications such as DC/DC converter.
PACKAGE DRAWING (Unit: mm)
85
1, 2, 3
: Source
4 : Gate
5, 6, 7, 8, 9 : Drain
FEATURES
• High voltage: VDSS = 200 V
• Gate voltage rating: ±30 V
• Low on-state resistance
RDS(on) = 0.44 Ω MAX. (VGS = 10 V, ID = 3.5 A)
• Low input capacitance
Ciss = 420 pF TYP. (VDS = 10 V, VGS = 0 V)
• Built-in gate protection diode
• Small and surface mount package (Power HSOP8)
• Avalanche capability rated
ORDERING INFORMATION
PART NUMBER
µPA1740TP
PACKAGE
Power HSOP8
14
5.2
+0.17
–0.2
0.8 ±0.2
S
6.0 ±0.3
4.4 ±0.15
1.27 TYP.
0.40
+0.10
–0.05
14
0.12 M
2.0 ±0.2
9
4.1 MAX.
85
0.10 S
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, Unless otherwise noted, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
200
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±30
V
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)Note2
Channel Temperature
ID(DC)
ID(pulse)
PT1
PT2
Tch
±7.0
±21
22
1.0
150
A
A
W EQUIVALENT CIRCUIT
W Drain
°C
Storage Temperature
Single Avalanche Current Note3
Single Avalanche Energy Note3
Repetitive Avalanche Current Note4
Repetitive Avalanche Energy Note4
Tstg
–55 to + 150
°C
IAS 7.0 A
EAS 4.9 mJ
IAR 7.0 A
EAR 2.2 mJ
Gate
Body
Diode
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec
3. Starting Tch = 25°C, VDD = 100 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V
4. Tch ≤ 125°C, VDD = 100 V, RG = 25 Ω
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G15937EJ1V0DS00 (1st edition)
Date Published May 2002 NS CP(K)
Printed in Japan
©
2001
1 page  
µPA1740TP
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
1.4
VGS = 10 V
1.2 Pulsed
1
0.8 ID = 7.0 A
0.6
3.5 A
0.4
www.DataSheet4U.com
0.2
0
-50 -25 0 25 50 75 100 125 150
Tch - Channel Temperature - °C
1000
100
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
Ciss
Coss
10 Crss
VGS = 0 V
f = 1 MHz
1
0.1 1
10 100
VDS - Drain to Source Voltage - V
1000
SWITCHING CHARACTERISTICS
100
VDD = 100 V
VGS = 10 V
RG = 0 Ω
td(off)
10 tr
tf
td(on)
1
0.1
1 10
ID - Drain Current - A
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
240 12
220
VDD = 160 V
ID = 7.0 A
200 100 V
40 V
180
10
160 8
140
120
VGS
6
100
80 4
60
40
VDS
20
2
00
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100
Pulsed
1000
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
10
100
1 VGS = 0 V
0.1
10
0.01
0
0.25 0.5 0.75 1 1.25
VSD - Source to Drain Voltage - V
1.5
1
0.1
Data Sheet G15937EJ1V0DS
VGS = 0 V
di/dt = 100 A/ µs
1 10
IF - Diode Forward Current - A
100
5
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| PDF Descargar | [ Datasheet UPA1740TP.PDF ] | |
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