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PDF LPC2148 Data sheet ( Hoja de datos )

Número de pieza LPC2148
Descripción 16/32 Bit Microcontroller
Fabricantes Philips 
Logotipo Philips Logotipo

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1. Datasheet - 16/32 Bit Microcontroller






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No Preview Available ! LPC2148 Hoja de datos, Descripción, Manual

LPC2142/2148
Single-chip 16/32-bit microcontrollers; 64/512 kB flash with
ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
Rev. 01 — 22 June 2005
Preliminary data sheet
1. General description
The LPC2142/2148 microcontrollers are based on a 32/16-bit ARM7TDMI-S CPU with
real-time emulation and embedded trace support, that combines the microcontroller with
64 kB and 512 kB of embedded high-speed flash memory. A 128-bit wide memory
interface and a unique accelerator architecture enable 32-bit code execution at the
maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode
reduces code by more than 30 % with minimal performance penalty.
Due to their tiny size and low power consumption, LPC2142/2148 are ideal for
applications where miniaturization is a key requirement, such as access control and
point-of-sale. A blend of serial communications interfaces ranging from a USB 2.0
Full-speed device, multiple UARTs, SPI, SSP to I2C-bus and on-chip SRAM of
16 kB/40 kB, make these devices very well suited for communication gateways and
protocol converters, soft modems, voice recognition and low end imaging, providing both
large buffer size and high processing power. Various 32-bit timers, single or dual 10-bit
ADC(s), 10-bit DAC, PWM channels and 45 fast GPIO lines with up to nine edge or level
sensitive external interrupt pins make these microcontrollers particularly suitable for
industrial control and medical systems.
2. Features
2.1 Key features
16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
16 kB/40 kB of on-chip static RAM and 64 kB/512 kB of on-chip flash program
memory.
128-bit wide interface/accelerator enables high-speed 60 MHz operation.
In-System Programming/In-Application Programming (ISP/IAP) via on-chip
boot-loader software. Single flash sector or full chip erase in 400 ms and programming
of 256 bytes in 1 ms.
EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the
on-chip RealMonitor software and high-speed tracing of instruction execution.
USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM.
In addition, the LPC2148 provides 8 kB of on-chip RAM accessible to USB by DMA.
One or two (LPC2142/48) 10-bit ADCs provide a total of 6/14 analog inputs, with
conversion times as low as 2.44 µs per channel.
Single 10-bit DAC provides variable analog output.
Two 32-bit timers/external event counters (with four capture and four compare
channels each), PWM unit (six outputs) and watchdog.

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LPC2148 pdf
Philips Semiconductors
LPC2142/2148
Single-chip 16/32-bit microcontrollers
5.2 Pin description
Table 3: Pin description
Symbol
Pin
P0.0 to P0.31
Type
I/O
P0.0/TXD0/
PWM1
19 [1]
P0.1/RXD0/
21 [2]
PWM3/EINT0
P0.2/SCL0/
CAP0.0
22 [3]
P0.3/SDA0/
26 [3]
MAT0.0/EINT1
P0.4/SCK0/
27 [4]
CAP0.1/AD0.6
P0.5/MISO0/ 29 [4]
MAT0.1/AD0.7
P0.6/MOSI0/ 30 [4]
CAP0.2/AD1.0
P0.7/SSEL0/ 31 [2]
PWM2/EINT2
P0.8/TXD1/
33 [4]
PWM4/AD1.1
I/O
O
O
I/O
I
O
I
I/O
I/O
I
I/O
I/O
O
I
I/O
I/O
I
I
I/O
I/O
O
I
I/O
I/O
I
I
I/O
I
O
I
I/O
O
O
I
Description
Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each bit.
Total of 31 pins of the Port 0 can be used as a general purpose bidirectional
digital I/Os while P0.31 is output only pin. The operation of port 0 pins
depends upon the pin function selected via the pin connect block.
Pins P0.24, P0.26 and P0.27 are not available.
P0.0 — General purpose input/output digital pin (GPIO).
TXD0 — Transmitter output for UART0.
PWM1 — Pulse Width Modulator output 1.
P0.1 — General purpose input/output digital pin (GPIO).
RXD0 — Receiver input for UART0.
PWM3 — Pulse Width Modulator output 3.
EINT0 — External interrupt 0 input
P0.2 — General purpose input/output digital pin (GPIO).
SCL0 — I2C0 clock input/output. Open-drain output (for I2C-bus compliance).
CAP0.0 — Capture input for Timer 0, channel 0.
P0.3 — General purpose input/output digital pin (GPIO).
SDA0 — I2C0 data input/output. Open-drain output (for I2C-bus compliance).
MAT0.0 — Match output for Timer 0, channel 0.
EINT1 — External interrupt 1 input.
P0.4 — General purpose input/output digital pin (GPIO).
SCK0 — Serial clock for SPI0. SPI clock output from master or input to slave.
CAP0.1 — Capture input for Timer 0, channel 0.
AD0.6 — ADC 0, input 6.
P0.5 — General purpose input/output digital pin (GPIO).
MISO0 — Master In Slave OUT for SPI0. Data input to SPI master or data
output from SPI slave.
MAT0.1 — Match output for Timer 0, channel 1.
AD0.7 — ADC 0, input 7.
P0.6 — General purpose input/output digital pin (GPIO).
MOSI0 — Master Out Slave In for SPI0. Data output from SPI master or data
input to SPI slave.
CAP0.2 — Capture input for Timer 0, channel 2.
AD1.0 — ADC 1, input 0. Available in LPC2148 only.
P0.7 — General purpose input/output digital pin (GPIO).
SSEL0 — Slave Select for SPI0. Selects the SPI interface as a slave.
PWM2 — Pulse Width Modulator output 2.
EINT2 — External interrupt 2 input.
P0.8 — General purpose input/output digital pin (GPIO).
TXD1 — Transmitter output for UART1.
PWM4 — Pulse Width Modulator output 4.
AD1.1 — ADC 1, input 1. Available in LPC2148 only.
9397 750 14985
Preliminary data sheet
Rev. 01 — 22 June 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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LPC2148 arduino
Philips Semiconductors
LPC2142/2148
Single-chip 16/32-bit microcontrollers
In case of LPC2148 only, an 8 kB SRAM block intended to be utilized mainly by the USB
can also be used as a general purpose RAM for data storage and code storage and
execution.
6.4 Memory map
The LPC2142/2148 memory map incorporates several distinct regions, as shown in
Figure 3.
In addition, the CPU interrupt vectors may be remapped to allow them to reside in either
flash memory (the default) or on-chip static RAM. This is described in Section 6.22
“System control”.
4.0 GB
3.75 GB
3.5 GB
AHB PERIPHERALS
VPB PERIPHERALS
0xFFFF FFFF
0xF000 0000
0xE000 0000
3.0 GB
RESERVED ADDRESS SPACE
0xC000 0000
2.0 GB
1.0 GB
0.0 GB
BOOT BLOCK (RE-MAPPED FROM
ON-CHIP FLASH MEMORY
RESERVED ADDRESS SPACE
32 kB ON-CHIP STATIC RAM (LPC2148)
16 kB ON-CHIP STATIC RAM (LPC2142)
RESERVED ADDRESS SPACE
512 kB ON-CHIP NON-VOLATILE MEMORY
(LPC2148)
64 kB ON-CHIP NON-VOLATILE MEMORY
(LPC2142)
0x8000 0000
0x7FFF FFFF
0x7FFF D000
0x7FFF CFFF
0x4001 8000
0x4000 7FFF
0x4000 4000
0x4000 3FFF
0x4000 0000
0x0008 0000
0x0007 FFFF
0x0001 0000
0x0000 FFFF
0x0000 0000
002aab558
Fig 3. LPC2142/2148 memory map
6.5 Interrupt controller
The VIC accepts all of the interrupt request inputs and categorizes them as Fast Interrupt
Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by
programmable settings. The programmable assignment scheme means that priorities of
interrupts from the various peripherals can be dynamically assigned and adjusted.
9397 750 14985
Preliminary data sheet
Rev. 01 — 22 June 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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