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EX29DL320 の電気的特性と機能

EX29DL320のメーカーはExcel Semiconductorです、この部品の機能は「Simultaneous Operation Flash Memory」です。


製品の詳細 ( Datasheet PDF )

部品番号 EX29DL320
部品説明 Simultaneous Operation Flash Memory
メーカ Excel Semiconductor
ロゴ Excel Semiconductor ロゴ 




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EX29DL320 Datasheet, EX29DL320 PDF,ピン配置, 機能
www.DataSheet4U.com
ADVANCED INFORMATION
EE SS II
Excel Semiconductor inc.
ES29DL320
32Mbit(4M x 8/2M x 16)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
GENERAL FEATURES
• Single power supply operation
- 2.7V - 3.6V for read, program and erase operations
• Simultaneous Read/Write operations
- Data can be continuously read from one bank while
executing erase/program functions in another bank
- Zero latency between read and write operations
• Multi-Bank architecture
- Read may occur in any of the banks not being
written or erased
- Multi-Bank may be grouped by customer to achieve
desired bank divisions
• Top or Bottom boot block
- ES29DL320T for Top boot block device
- ES29DL320B for Bottom boot block device
• A 256 bytes of extra sector for security code
- Factory locked
- Customer lockable
• Package Options
- 48-pin TSOP
- 48-ball FBGA
- All Pb-free products are RoHS-Compliant
• Low Vcc write inhibit
• Manufactured on 0.18um process technology
• Compatible with JEDEC standards
- Pinout and software compatible with single-power
supply flash standard
DEVICE PERFORMANCE
• Read access time
- 70ns/90ns for normal Vcc range ( 2.7V ~ 3.6V )
• Program and erase time
- Program time : 6us/byte, 8us/word ( typical )
- Accelerated program time : 4us/word ( typical )
- Sector erase time : 0.7sec/sector ( typical )
• Power consumption (typical values)
- 15uA in standby or automatic sleep mode
- 10mA active read current at 5MHz
- 15mA active write current during program or erase
• Minimum 100,000 program/erase cycles per sector
• 20 Year data retention at 125oC
SOFTWARE FEATURES
• Erase Suspend / Erase Resume
• Data# poll and toggle for program/erase status
• CFI ( Common Flash Interface) supported
• Unlock Bypass Program
• Autoselect mode
• Auto-sleep mode after tACC + 30ns
HARDWARE FEATURES
• Hardware reset input pin ( RESET#)
- Provides a hardware reset to device
- Any internal device operation is terminated and the
device returns to read mode by the reset
• Ready/Busy# output pin ( RY/BY#)
- Provides a program or erase operational status
about whether it is finished for read or still being
progressed
• WP#/ACC input pin
- Two outermost boot sectors are protected when
WP# is set to low, regardless of sector protection
- Program speed is accelerated by raising WP#/ACC
to a high voltage (8.5V ~ 9.5V)
• Sector protection / unprotection ( RESET# , A9 )
- Hardware method of locking a sector to prevent
any program or erase operation within that sector
- Two methods are provided :
- In-system method by RESET# pin
- A9 high-voltage method for PROM programmers
• Temporary Sector unprotection ( RESET# )
- Allows temporary unprotection of previously
protected sectors to change data in-system
ES29DL320
1 Rev. 0E May 25, 2006

1 Page





EX29DL320 pdf, ピン配列
www.DataSheet4U.com
ADVANCED INFORMATION
PRODUCT SELECTOR GUIDE
Family Part Number
Voltage Range
Speed Option
Max Access Time (ns)
CE# Access (ns)
OE# Access (ns)
EE SS II
Excel Semiconductor inc.
ES29DL320
2.7V ~ 3.6V
70 90
70 90
70 90
30 40
FUNCTION BLOCK DIAGRAM
Vcc
Vss
A<20:0>
MUX
Bank 1 Address
OE# BYTE#
BANK 0
X - Decoder
RY/BY# Bank2 Address
A<20:0>
RESET#
WE#
CE#
BYTE#
WP#/ACC
DQ15-DQ0
STATE
CONTROL
&
COMMAND
REGISTER
Bank 7 Address
BANK 1
X - Decoder
X - Decoder
BANK 6
A<20:0>
MUX
Bank 8 Address
X - Decoder
BANK 7
MUX
DQ15-DQ0
ES29DL320
3 Rev. 0E May 25, 2006


3Pages


EX29DL320 電子部品, 半導体
www.DataSheet4U.com
ADVANCED INFORMATION
DEVICE BUS OPERATIONS
EE SS II
Excel Semiconductor inc.
Several device operational modes are provided in
the ES29DL320 device. Commands are used to ini-
tiate the device operations. They are latched and
stored into internal registers with the address and
data information needed to execute the device
operation.
The available device operational modes are listed
in Table 1 with the required inputs, controls, and the
resulting outputs. Each operational mode is
described in further detail in the following subsec-
tions.
Read
The internal state of the device is set for the read
mode and the device is ready for reading array data
upon device power-up, or after a hardware reset. To
read the stored data from the cell array of the
device, CE# and OE# pins should be driven to VIL
while WE# pin remains at VIH. CE# is the power
control and selects the device. OE# is the output
control and gates array data to the output pins.
Word or byte mode of output data is determined by
the BYTE# pin. No additional command is needed
in this mode to obtain array data. Standard micro-
processor read cycles that assert valid addresses
on the device address inputs produce valid data on
the device data outputs. Each bank stays at the
read mode until another operation is activated by
writing commands into the internal command regis-
ter. Refer to the AC read cycle timing diagrams for
further details ( Fig. 18 ).
Simultaneous Read/Write Operation
This device is capable of reading data from one bank
of memory while programming or erasing in the
other bank of memory. An erase operation may also
be suspended to read from or program to another
location within the same bank (except the sector
being erased). Figure 33 shows how read and write
cycles may be initiated for simultaneous operation
with zero latency. Refer to the CMOS DC character-
istics Table11 for further current specification.
Word/Byte Mode Configuration ( BYTE# )
The device data output can be configured by BYTE#
into one of two modes : word and byte modes. If the
BYTE# pin is set at logic ‘1’, the device is configured
in word mode, DQ0 - DQ15 are active and controlled
by CE# and OE#. If the BYTE# pin is set at logic ‘0’,
the device is configured in byte mode, and only data
I/O pins DQ0 - DQ7 are active and controlled by CE#
and OE#. The data I/O pins DQ8 - DQ14 are tri-
stated, and the DQ15 pin is used as an input for the
LSB (A-1) address.
Standby Mode
When the device is not selected or activated in a
system, it needs to stay at the standby mode, in
which current consumption is greatly reduced with
outputs in the high impedance state.
ES29DL320
6 Rev. 0E May 25, 2006

6 Page



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部品番号部品説明メーカ
EX29DL320

Simultaneous Operation Flash Memory

Excel Semiconductor
Excel Semiconductor


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