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PDF 53CF92A Data sheet ( Hoja de datos )
| Número de pieza | 53CF92A | |
| Descripción | LSI53CF92A | |
| Fabricantes | LSI | |
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www.DataSheet4U.com
TECHNICAL
MANUAL
LSI53CF92A
Fast SCSI Controller
April 2002
Version 2.1
®
1 page  
www.DataSheet4U.com
Conventions Used in This Manual
The word assert means to drive a signal true or active. The word
deassert means to drive a signal false or inactive.
Hexadecimal numbers are indicated by the prefix “0x” —for example,
0x32CF. Binary numbers are indicated by the prefix “0b” —for example,
0b0011.0010.1100.1111.
Revision Record
Revision
1.0
1.1
2.0
2.1
Date
12/97
4/99
11/00
12/01
Remarks
First version.
Miscellaneous edits, reformat.
All product names changed from SYM® to LSI.
Updated Tables 6.7, 6.13, and 6.15 and Figures 6.9, 6.12, and 6.16.
Preface
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
v
5 Page 
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Figures
1.1
1.2
1.3
2.1
2.2
2.3
2.4
3.1
3.2
4.1
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
6.17
6.18
6.19
6.20
6.21
Functional Block Diagram
Bus Configuration, Multiplexed Mode (Dual Bus,
8-Bit DMA Bus and 8-Bit Multiplexed Processor
Address/Data Bus)
Bus Configuration, Nonmultiplexed Mode (Dual Bus,
8-Bit DMA Bus and 8-Bit Processor Bus)
Normal DMA Mode
DMA Burst Mode (Multiplexed Mode and Nonmultiplexed
Mode Writes)
DMA Burst Mode (Nonmultiplexed Mode Reads)
SCAM Transfer Cycles
Functional Signal Grouping
LSI53CF92A 64-Pin Plastic QFP and Thin QFP Pin
Configuration1
REQ/ ACK/ Deassertion Delay
Rise and Fall Time Test Conditions
SCSI Input Filtering
Hysteresis of SCSI Receivers
Input Current as a Function of Input Voltage
Output Current as a Function of Output Voltage
Clock Input
Reset Input
Interrupt Output
Register Read, Nonmultiplexed PAD Bus
Register Write, Nonmultiplexed PAD Bus
Register Read, Multiplexed PAD Bus
Register Write, Multiplexed PAD Bus
DMA Read, Nonmultiplexed Mode Only
DMA Write, Nonmultiplexed Mode Only
DMA Read, Multiplexed Mode Only
DMA Write, Multiplexed Mode Only
Burst Mode DMA Read, Multiplexed Mode Only
Burst Mode DMA Write, Multiplexed Mode Only
Burst Mode DMA Read, Nonmultiplexed Mode Only
Burst Mode DMA Write, Nonmultiplexed Mode Only
Initiator Asynchronous Send
1-4
1-5
1-5
2-10
2-13
2-13
2-23
3-1
3-6
4-23
6-5
6-5
6-5
6-6
6-6
6-8
6-9
6-10
6-11
6-11
6-13
6-13
6-15
6-15
6-17
6-17
6-19
6-19
6-21
6-21
6-23
Contents
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
xi
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