DataSheet.jp

EUA5202 の電気的特性と機能

EUA5202のメーカーはEuTechです、この部品の機能は「Stereo Audio Power Amplifier」です。


製品の詳細 ( Datasheet PDF )

部品番号 EUA5202
部品説明 Stereo Audio Power Amplifier
メーカ EuTech
ロゴ EuTech ロゴ 




このページの下部にプレビューとEUA5202ダウンロード(pdfファイル)リンクがあります。
Total 22 pages

No Preview Available !

EUA5202 Datasheet, EUA5202 PDF,ピン配置, 機能
www.DataSheet4U.com
EUA5202
2-W Stereo Audio Power Amplifier
with Mute
DESCRIPTION
The EUA5202 is a stereo audio power amplifier that
delivering 2W of continuous RMS power per channel
into 3-loads. When driving 1W into 8-speakers, the
EUA5202 has less than 0.04% THD+N across its
specified frequency range. Included within this device is
integrated de-pop circuitry that virtually eliminates
transients that cause noise in the speakers.
Amplifier gain is externally configured by means of two
resistors per input channel and does not require external
compensation for settings of 2 to 20 in BTL mode (1 to
10 in SE mode). An internal input MUX allows two sets
of stereo inputs to the amplifier. In notebook
applications, where internal speakers are driven as BTL
and the line (often headphone drive) outputs are required
to be SE, the EUA5202 automatically switches into SE
mode when the SE/BTL inputs is activated. Consume
only 7mA of supply current during normal operation,
and the EUA5202 also features a shutdown function for
power sensitive applications, holding the supply current
at 1µA.
FEATURES
z Output Power at 3Load
- 2W/ch at VDD=5V
- 800mW/ch at 3V
z Low Supply Current and Shutdown Current
z Integrated Depop Circuit
z Mute and Shutdown Control Function
z Thermal Shutdown Protection
z Stereo Input MUX
z Bridge-Tied Load (BTL) or Single-Ended (SE)
Modes.
z TSSOP-24 with Thermal Pad
APPLICATIONS
z Notebook Computers
z Multimedia Monitors
z Digital Radios and Portable TVs
Block Diagram
DS5202 Ver 1.4 Nov. 2004
1

1 Page





EUA5202 pdf, ピン配列
www.DataSheet4U.com
Pin Configurations
Package
TSSOP-24 with Thermal
Pad, exposure on the bottom
of the package
EUA5202
Pin Configurations
Pin Description
PIN
HP/LINE
LBYPASS
PIN I/O
16 I
6
LHPIN
5I
LLINE IN
LOUT+
LOUT-
GND/HS
LVDD
MUTE IN
MUTE OUT
NC
RBYPASS
4
3
10
1,12,13,
24
7
11
9
17,23
19
I
O
O
I
I
O
RHPIN
20 I
RLINEIN
ROUT+
ROUT-
RVDD
SE/BTL
SHUTDOWN
TJ
21
22
15
18
14
8
2
I
O
O
I
I
I
O
DESCRIPTION
Input MUX control input, hold high to select LHP IN or RHP IN (5, 20), hold
low to select LLINE IN or RLINE IN (4, 21)
Tap to voltage divider for left channel internal mid-supply bias
Left channel headphone input, selected when HP/LINE terminal (16) is held
high
Left channel line input, selected when HP/LINE terminal (16) is held low
Left channel + output in BTL mode, + output in SE mode
Left channel - output in BTL mode, high-impedance state in SE mode
Ground connection for circuitry, directly connected to thermal pad
Supply voltage input for left channel and for primary bias circuits
Mute all amplifiers, hold low for normal operation, hold high to mute
Follows MUTE IN terminal (11), provides buffered output
No internal connection
Tap to voltage divider for right channel internal mid-supply bias
Right channel headphone input, selected when HP/LINE terminal (16) is held
high
Right channel line input, selected when HP/LINE terminal (16) is held low
Right channel + output in BTL mode, + output in SE mode
Right channel - output in BTL mode, high-impedance state in SE mode
Supply voltage input for high channel
Hold low foe BTL mod, hold high for SE mode
Places entire IC in shutdown mode when held high, IDD=5µA
Sources a current proportional to the junction temperature. This terminal should
be left unconnected during normal operation.
DS5202 Ver 1.4 Nov. 2004
3


3Pages


EUA5202 電子部品, 半導体
www.DataSheet4U.com
Typical Ac Operating Characteristics, VDD=5V, TA=25°C, RL=3
Symbol
Parameter
Conditions
PO
THD+N
BOM
Output Power(each
channel)*1
Total Harmonic Distortion
Plus Noise
Maximum Output Power
Bandwidth
Supply Ripple Rejection
Ratio
THD=0.2%, BTL, See Figure 3
THD=1%, BTL, See Figure 3
PO=2W, f=1KHz ,See Figure5
V1=1V, RL=10k, AV=1V/V
AV=10V/V THD <1% See Figure5
f=1KHz, See Figure37
f=20-20KHz, See Figure37
Mute Attenuation
Channel-to- Channel Output
Separation
Line/HP Input Separation
BTL Attenuation in SE
Mode
Z1 Input Impedance
Signal-to-Noise Ratio
VN Output Noise Voltage
f=1KHz, See Figure 39
PO=2W,BTL, 5V
See Figure 35
*1: Output Power is measured at the output terminals of the IC at 1 KHz
Typical Ac Operating Characteristics, VDD=3.3V, TA=25°C, RL=3
Symbol
Parameter
Conditions
PO
THD+N
BOM
Output Power(each
channel)*1
Total Harmonic Distortion
Plus Noise
Maximum Output Power
Bandwidth
Supply Ripple Rejection
Ratio
THD=0.2%, BTL, See Figure 10
THD=1%, BTL, See Figure 10
PO=2W, f=1KHz ,See Figure11
V1=1V, RL=10k, AV =1V/V
AV=10V/V THD <1%, See Figure11
f=1KHz, See Figure37
f=20-20KHz, See Figure37
Mute Attenuation
Channel-to- Channel Output
Separation
Line/HP Input Separation
BTL Attenuation in SE
Mode
Z1 Input Impedance
Signal - to - Noise Ratio
VN Output Noise Voltage
f=1KHz, See Figure 40
PO=700mW,BTL, 5V
See Figure 36
*1: Output Power is measured at the output terminals of the IC at 1 KHz
DS5202 Ver 1.4 Nov. 2004
6
EUA5202
Typ.
2
2.2
200
100
>20
65
40
85
85
88
86
2
101
22
Unit
W
m%
m%
KHz
dB
dB
dB
dB
dB
M
dB
µV(rms)
Typ.
800
900
350
200
>20
60
40
85
80
88
86
2
96
22
Unit
W
m%
m%
KHz
dB
dB
dB
dB
dB
M
dB
µV(rms)

6 Page



ページ 合計 : 22 ページ
 
PDF
ダウンロード
[ EUA5202 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
EUA5202

Stereo Audio Power Amplifier

EuTech
EuTech


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap