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PDF MD1210 Data sheet ( Hoja de datos )

Número de pieza MD1210
Descripción HIGH SPEED DUAL MOSFET DRIVER
Fabricantes Supertex 
Logotipo Supertex Logotipo



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High Speed, Dual MOSFET Driver
MD1210
Initial Release
Features
6.0ns rise and fall time with 1000pF load
2.0A peak output source/sink current
1.2V to 5V input CMOS compatible
4.5V to 13V total supply voltage
Smart Logic threshold
Low jitter design
Dual matched channels
Outputs can swing below ground
Low inductance package
Thermally-enhanced package
Applications
Medical ultrasound imaging
Piezoelectric transducer drivers
Nondestructive evaluation
PIN diode driver
Clock driver/buffer
High speed level translator
Typical Application Circuit
General Description
The Supertex MD1210 is a high speed, dual MOSFET driver. It is
designed to drive high voltage N- and P-channel MOSFET
transistors for medical ultrasound applications and other
application requiring a high output current for a capacitive load.
The high-speed input stage of the MD1210 can operate from 1.2
to 5.0 volt logic interface with an optimum operating input signal
range of 1.8 to 3.3 volts. An adaptive threshold circuit is used to
set the level translator switch threshold to the average of the input
logic 0 and logic 1 levels. The input logic levels may be ground
referenced, even though the driver is putting out bipolar signals.
The level translator uses a proprietary circuit, which provides DC
coupling together with high-speed operation.
The output stage of the MD1210 has separate power connections
enabling the output signal L and H levels to be chosen
independently from the supply voltages used for the majority of
the circuit. As an example, the input logic levels may be 0 and 1.8
volts, the control logic may be powered by +5.0 and –5.0 volts,
and the output L and H levels may be varied anywhere over the
range of –5.0 to +5.0 volts. The output stage is capable of peak
currents of up to ±2.0 amps, depending on the supply voltages
used and load capacitance present.
The OE pin serves a dual purpose. First, its logic H level is used
to compute the threshold voltage level for the channel input level
translators. Secondly, when OE is low, the outputs are disabled,
with the A output high and the B output low. This assists in
properly pre-charging the AC coupling capacitors that may be
used in series in the gate drive circuit of an external PMOS and
NMOS transistor pair.
NR013105
1 PR120104

1 page




MD1210 pdf
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MD1210
Pin Description
VDD1
VDD2
VSS1
VSS2
VH
VL
GND
High side analog circuit and level shifter supply voltage. Should be at the same potential as VDD2.
High side gate drive supply voltage
Low side analog circuit and level shifter supply voltage. Should be at the same potential as VSS2.
Low side gate drive supply voltage
Supply voltage for P-channel output stage
Supply voltage for N-channel output stage
Logic input ground reference
OE
Output-enable logic input. When OE is high, (VOE+VGND)/2 sets the threshold transition between logic level high
and low for INA and INB. When OE is low, OUTA is at VH and OUTB is at VL regardless of INA and INB.
INA
Logic input. Controls OUTA when OE is high. Input logic high will cause the output to swing to VL. Input logic
low will cause the output to swing to VH.
INB
OUTA
OUTB
Logic input. Controls OUTB when OE is high. Input logic high will cause the output to swing to VL. Input logic
low will cause the output to swing to VH.
Output driver. Swings from VH to VL. Intended to drive the gate of an external P-channel MOSFET via a series
capacitor. When OE is low, the output is disabled. OUTA will swing to VH turning off the external P-channel
MOSFET.
Output driver. Swings from VH to VL. Intended to drive the gate of an external N-channel MOSFET via a series
capacitor. When OE is low, the output is disabled. OUTB will swing to VL turning off the external N-channel
MOSFET.
Pin Configuration
Pin #
1
2
3
Function
INA
VL
INB
4 GND
5 VSS1
6 VSS2
7 OUTB
8 VH
9 OUTA
10 VDD2
11 VDD1
12 OE
Note
Thermal Pad, and substrate are
connected to Pin#5,VSS1
2.15
12
10
1
QFN-12
4x4x0.9
3
0.30
4
6
0.80
(Top View, mm)
9
2.15
7
0.55
Doc.#: DSFP-MD1210
NR013105
5
NR013105

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