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3D7444 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 3D7444
部品説明 MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE
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3D7444 Datasheet, 3D7444 PDF,ピン配置, 機能
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MONOLITHIC QUAD 4-BIT
PROGRAMMABLE DELAY LINE
(SERIES 3D7444)
3D7444
FEATURES
Four indep’t programmable lines on a single chip
All-silicon CMOS technology
Low quiescent current (1mA typical)
Leading- and trailing-edge accuracy
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Increment range: 1.5ns through 25ns
Delay tolerance: 1ns or 2% (See Table 1)
Temperature stability: ±2% typical (0C-70C)
Vdd stability: ±1% typical
Minimum input pulse width: 10% of total delay
PACKAGES
I1
SC
I2
I3
I4
SI
GND
1 14
2 13
3 12
4 11
5 10
69
78
DIP-14
3D7444-xx
VDD
AL
O1
SO
O2
O3
O4
I1
SC
I2
I3
I4
SI
GND
1 14 VDD
2 13 AL
3 12 O1
4 11 SO
5 10 O2
6 9 O3
7 8 O4
SOIC-14
3D7444D-xx
For mechanical dimensions, click here.
For package marking details, click here.
FUNCTIONAL DESCRIPTION
The 3D7444 device is a small, versatile, quad 4-bit programmable
monolithic delay line. Delay values, programmed via the serial interface,
can be independently varied over 15 equal steps. The step size (in ns) is
determined by the device dash number. Each input is reproduced at the
corresponding output without inversion, shifted in time as per user
selection. For each line, the delay time is given by:
TDn = T0 + An * TI
PIN DESCRIPTIONS
I1-I4 Signal Inputs
O1-O4 Signal Outputs
AL Address Latch In
SC Serial Clock In
SI Serial Data In
SO Serial Data Out
VDD 5.0V
GND Ground
where T0 is the inherent delay, An is the delay address of the n-th line and
TI is the delay increment (dash number). The desired addresses are shifted into the device via the SC and
SI inputs, and the addresses are latched using the AL input. The serial interface can also be used to
enable/disable each delay line. The 3D7444 operates at 5 volts and has a typical T0 of 6ns. The 3D7444 is
CMOS-compatible, capable of sourcing or sinking 4mA loads, and features both rising- and falling-edge
accuracy. The device is offered in a standard 14-pin auto-insertable DIP and a space saving surface mount
14-pin SOIC.
TABLE 1: PART NUMBER SPECIFICATIONS
PART
NUMBER
3D7444-1.5
3D7444-2
3D7444-4
3D7444-5
3D7444-8
3D7444-10
3D7444-15
3D7444-20
3D7444-25
DELAYS AND TOLERANCES (ns)
Delay
Total
Inherent
Increment
Delay
Delay
1.5 ± 1.00 22.5 ± 1.0
6 ± 2.0
2.0 ± 1.50 30.0 ± 1.0
6 ± 2.0
4.0 ± 2.00 60.0 ± 1.2
6 ± 2.0
5.0 ± 2.25 75.0 ± 1.5
6 ± 2.0
8.0 ± 3.00
120 ± 2.4
6 ± 2.0
10 ± 3.00
150 ± 3.0
6 ± 2.0
15 ± 4.00
225 ± 4.5
6 ± 2.0
20 ± 6.00
300 ± 6.0
6 ± 2.0
25 ± 7.00
375 ± 7.5
6 ± 2.0
INPUT RESTRICTIONS
Max Freq. (MHz)
Min P.W. (ns)
Recommended Absolute Recommended Absolute
20.0 166 25.0
3.0
13.8 166 36.0
3.0
7.57 83.3 66.0
6.0
6.17 66.6 81.0
7.5
3.96 41.6 126.0 12.0
3.20 33.3 156.0 15.0
2.16 22.2 231.0 22.5
1.63 16.6 306.0 30.0
1.31 13.3 381.0 37.5
NOTES: Any increment between 1.5 and 25 ns not shown is also available as standard
Total delay is given by delay at address 15 minus delay at address 0
2003 Data Delay Devices
Doc #03006
12/8/03
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
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