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3D7408 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 3D7408
部品説明 MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE
メーカ Data Delay Devices
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3D7408 Datasheet, 3D7408 PDF,ピン配置, 機能
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MONOLITHIC 8-BIT
PROGRAMMABLE DELAY LINE
(SERIES 3D7408)
3D7408
data
delay
3
®
devices, inc.
FEATURES
PACKAGES
All-silicon, low-power CMOS technology
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Leading- and trailing-edge accuracy
Increment range: 0.25 through 5.0ns
Delay tolerance: 1% (See Table 1)
Temperature stability: ±3% typical (0C-70C)
Vdd stability: ±1% typical (4.75V-5.25V)
Minimum input pulse width: 10% of total
delay
Programmable via 3-wire serial or 8-bit
parallel interface
IN 1 16 VDD
AE 2 15 OUT
SO/P0 3 14 MD
P1 4 13 P7
P2 5 12 P6
P3 6 11 SC
P4 7 10 P5
GND 8 9 SI
3D7408 DIP
3D7408G Gull Wing
(300 Mil)
IN
AE
SO/P0
P1
P2
P3
P4
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
3D7408S
SOIC
(300 Mil)
VDD
OUT
MD
P7
P6
SC
P5
SI
(For mechanical data, see Case Dimensions document)
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The 3D7408 Programmable 8-Bit Silicon Delay Line product
family consists of 8-bit, user-programmable CMOS silicon
integrated circuits. Delay values, programmed either via the
serial or parallel interface, can be varied over 255 equal steps
ranging from 250ps to 5.0ns inclusively. Units have a typical
inherent (zero step) delay of 12ns to 17ns (See Table 1). The
input is reproduced at the output without inversion, shifted in time
as per user selection. The 3D7408 is TTL- and CMOS-
compatible, capable of driving ten 74LS-type loads, and features
both rising- and falling-edge accuracy.
IN Signal Input
OUT Signal Output
MD Mode Select
AE Address Enable
P0-P7 Parallel Data Input
SC Serial Clock
SI Serial Data Input
SO Serial Data Output
VCC +5 Volts
GND Ground
The all-CMOS 3D7408 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL programmable delay lines. It is offered in a standard 16-pin auto-insertable DIP and a space saving
surface mount 16-pin SOIC.
TABLE 1: PART NUMBER SPECIFICATIONS
PART
NUMBER
3D7408-0.25
3D7408-0.5
3D7408-1
3D7408-2
3D7408-3
3D7408-4
3D7408-5
DELAYS AND TOLERANCES
Step 0
Step 255 Delay
Delay (ns) Delay (ns) Increment (ns)
12 ± 2 75.75 ± 4.0
0.25 ± 0.15
12 ± 2 139.5 ± 4.0
0.50 ± 0.25
12 ± 2 267.0 ± 5.0
1.00 ± 0.50
14 ± 2 522.0 ± 6.0
2.00 ± 1.00
17 ± 2 782.0 ± 8.0
3.00 ± 1.50
17 ± 2 1037 ± 9.0
4.00 ± 2.00
17 ± 2 1292 ± 10
5.00 ± 2.50
Max Operating
Frequency
6.25 MHz
3.15 MHz
1.56 MHz
0.78 MHz
0.52 MHz
0.39 MHz
0.31 MHz
INPUT RESTRICTIONS
Absolute Max Min Operating
Oper Freq
P.W.
90 MHz
80.0 ns
45 MHz
160.0 ns
22 MHz
320.0 ns
11 MHz
640.0 ns
7.5 MHz
960.0 ns
5.5 MHz
1280.0 ns
4.4 MHz
1600.0 ns
Absolute Min
Oper P.W.
5.5 ns
11.0 ns
22.0 ns
44.0 ns
66.0 ns
88.0 ns
110.0 ns
NOTES: Any delay increment between 0.25 and 5.0 ns not shown is also available.
All delays referenced to input pin
Doc #96003
12/2/96
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
©1996 Data Delay Devices
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