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USB1T1105A の電気的特性と機能

USB1T1105AのメーカーはFairchild Semiconductorです、この部品の機能は「Universal Serial Bus Peripheral Transceiver」です。


製品の詳細 ( Datasheet PDF )

部品番号 USB1T1105A
部品説明 Universal Serial Bus Peripheral Transceiver
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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USB1T1105A Datasheet, USB1T1105A PDF,ピン配置, 機能
January 2005
Revised August 2005
USB1T1105A
Universal Serial Bus Peripheral Transceiver
with Voltage Regulator
www.DataSheet4U.com
General Description
The USB1T1105A is an Universal Serial Bus Specification Rev
2.0 compliant transceiver. The device provides an USB inter-
face for Full-Speed (12Mbit/s) USB applications. The
USB1T1105A provides excellent flexibility, allowing differential
and single ended inputs while an integrated voltage regulator
sets the I/O level to 1.65V to 3.6V. Utilizing an integrated 5.0V to
3.3V voltage regulator, the part can be powered directly from
the USB host (VBUS) to minimize the power consumed from the
local sources while used in devices with low supply voltages.
The USB1T1105A provides 15kV ESD protection on the USB
bus pins (D/D). This eliminates the need for any external ESD
devices while providing excellent protection to larger and more
expensive ASICs and USB controllers.
Features
O Complies with Universal Serial Bus Specification 2.0
O Integrated 5V to 3.3V voltage regulator for powering VBus
O Utilizes digital inputs and outputs to transmit and receive
USB cable data
O Supports full speed 12Mbits/s speed data rates
O Ideal for portable electronic devices
O 15kV contact HBM ESD protection on bus pins
O 3.3mm leadless package
O Industry standard HBCC footprint is lead-free
Applications
O Cell phone
O PDA
O Digital camera
O MP3
Ordering Code:
Order Number
USB1T1105AMHX
Package
Number
MLP16HB
Package Description
Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
Pb-Free package per JEDEC J-STD-020B.
Logic Diagram
© 2005 Fairchild Semiconductor Corporation
DS500911
www.fairchildsemi.com

1 Page





USB1T1105A pdf, ピン配列
Terminal Terminal
Number Name
15 VPU (3.3V)
16
Exposed
Diepad
Config
GND
I/O
I
GND
Terminal Description
Pull-up Supply Voltage (3.3V r 10%):
Connect an external 1.5k: resistor on D (FS data rate);
Pin function is controlled by Config input pin:
Config = LOW  VPU (3.3V) is floating (High Impedance) for zero pull-up current.
Config = HIGH  VPU (3.3V) = 3.3V; internally connected to VREG (3.3V).
USB connect or disconnect software control input.
Configures 3.3V to external 1.5k: resistor on D when HIGH.
GND supply down bonded to exposed diepad to be connected to the PCB GND.
Functional Description
The USB1T1105A transceiver is designed to convert CMOS
data into USB differential bus signal levels and to convert USB
differential bus signal to CMOS data.
To minimize EMI and noise the outputs are edge rate controlled
with the rise and fall times controlled and defined for full speed
data rates. The rise, fall times are balanced between the differ-
ential pins to minimize skew.
Table 1 describes the specific pin functionality selection. Table
2, Table 3, and Table 4 describe the specific Truth Tables for
Driver and Receiver operating functions.
The USB1T1105A also has the capability of various power sup-
ply configurations to support mixed voltage supply applications
(see Table 5) and Power Supply Configurations and Options for
detailed descriptions.
Functional Tables
TABLE 1. Function Select
SUSPND
L
L
H
H
OE
L
H
L
H
D, D
Driving &
Receiving
Receiving
(Note 1)
Driving
3-STATE
(Note 1)
RCV
Active
Active
Inactive
(Note 2)
Inactive
(Note 2)
Vp/Vm
Active
Active
Function
Normal Driving
(Differential Receiver Active)
Receiving
Active
Active
Driving during Suspend
(Differential Receiver Inactive)
Low Power State
Note 1: Signal levels is function of connection and/or pull-up/pull-down resistors.
Note 2: For SUSPND = HIGH mode the differential receiver is inactive and the output RCV output is forced LOW. The out-of-suspend signaling (K) is detected via the single-
ended receiver outputs of the Vp and Vm pins.
TABLE 2. Driver Function (OE = L) using Differential Input Interface Mode Pin = H
Vmo
L
L
H
H
Vpo
L
H
L
H
Data
SE0 (Note 3)
Differential Logic 1
Differential Logic 0
Illegal State
Note 3: SE0 = Single Ended Zero
TABLE 3. Driver Function (OE = L) using Single-ended Input Interface Mode Pin = L
FSE0
L
L
H
H
Vo
L
H
L
H
Data
Differential Logic 0
Differential Logic 1
SE0 (Note 4)
SE0 (Note 4)
3 www.fairchildsemi.com


3Pages


USB1T1105A 電子部品, 半導体
DC Electrical Characteristics (Continued)
Symbol
Parameter
Conditions
IDr(SHARING)
VCCTH
VCCHYS
VCCIOTH
VCCIOHYS
Sharing Mode Load Current on
D/D Pins
VCC Threshold Detection Voltage
VCC Threshold Detection
Hysteresis Voltage
VCCIO Threshold Detection Voltage
VCCIO Threshold Detection
Hysteresis Voltage
VCC (5V) Not Connected
Config = LOW; VDr = 3.6V
1.65V d VCCIO d 3.6V
Supply Lost
Supply Present
VCCIO = 1.8V
2.7V d VREG d 3.6V
Supply Lost
Supply Present
VREG = 3.3V
Limits
40qC to 85qC
Min Typ Max
10.0
3.6
4.1
70.0
0.5
1.4
450
Note 8: ILOAD includes the pull-up resistor current via pin VPU
Note 9: The minimum voltage in Suspend mode is 2.7V.
Note 10: Not tested in production, value based on characterization.
Note 11: Excludes any current from load and VPU current to the 1.5k: resistor.
Note 12: Includes current between Vpu and the 1.5k internal pull-up resistor.
Note 13: When VCCIO  2.7V, minimum value for VREGTH = 2.0V for supply present condition.
DC Electrical Characteristics (Digital Pins – excludes D, D Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCCIO = 1.6V to 3.6V
Symbol
Parameter
Input Levels
VIL
VIH
VHYS
Output Levels
VOL
LOW Level Input Voltage
HIGH Level Input Voltage
Hysteresis Voltage P11  P12
LOW Level Output Voltage
VOH HIGH Level Output Voltage
Leakage Current
ILI
Capacitance
Input Leakage Current
CIN, CI/O
Input Capacitance
Test Conditions
Pins Vpo/Vmo, VCCIO = 3.3V
IOL = 2 mA
IOL = 100 PA
IOH = 2 mA
IOH = 100 PA
VCCIO = 1.65V to 3.6V
Pin to GND
Limits
40qC to 85qC
Min Max
0.6*VCCIO
0.3
0.3
0.7
VCCIO - 0.4
VCCIO- 0.15
0.4
0.15
r1.0 (Note 14)
10.0
Note 14: If VCCIO t VREG then leakage current will be higher than specified.
Units
PA
V
mV
V
mV
Units
V
V
V
V
V
PA
pF
www.fairchildsemi.com
6

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部品番号部品説明メーカ
USB1T1105A

Universal Serial Bus Peripheral Transceiver

Fairchild Semiconductor
Fairchild Semiconductor


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