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PDF ISL8106 Data sheet ( Hoja de datos )
| Número de pieza | ISL8106 | |
| Descripción | Single-Phase PWM Controller | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
November 10, 2006
ISL8106
FN9283.1
Wide VIN, 7V to 25V, Single-Phase PWM
Controller with Integrated MOSFET
Drivers
The ISL8106 is a Single-Phase Synchronous-Buck PWM
Controller with a input voltage range of +7.0V to +25.0V
featuring Intersil's Robust Ripple Regulator (R3) technology
that delivers exceptional dynamic response to input voltage
and output load transients. Integrated MOSFET drivers, 5V
LDO, and bootstrap diode result in fewer components and
smaller implementation area for power supply systems.
The ISL8106 features a 1.5ms digital soft-start and can be
started into a pre-biased output voltage. A resistor divider is
used to program the output voltage setpoint. The ISL8106
can be configured to operate in forced-continuous-
conduction-mode (FCCM) or in diode-emulation-mode
(DEM), which improves light-load efficiency. In FCCM the
controller always operates as a synchronous rectifier,
switching the bottom-side MOSFET regardless of the output
load. With DEM enabled, the bottom-side MOSFET is
disabled preventing negative current flow from the output
inductor during low load operation. This makes the ISL8106
an excellent choice for all “green” applications. An audio
filter prevents the PWM switching frequency from entering
the audible spectrum due to extremely light load while in
DEM.
A PGOOD pin featuring a unique fault-identification
capability significantly reduces system trouble-shooting time
and effort. The pull-down resistance of the PGOOD pin is
30Ω for an overcurrent fault, 60Ω for an overvoltage fault, or
90Ω for either an undervoltage fault or during soft-start.
Overcurrent protection is accomplished by measuring the
voltage drop across the rDS(ON) of the bottom-side
MOSFET. A single resistor programs the overcurrent and
short-circuit points. Overvoltage and undervoltage protection
is monitored at the FB voltage feedback pin.
Pinout
16 LD QFN (4mm x 4mm)
TOP VIEW
16 15 14 13
VIN 1
VCC 2
FCCM 3
EN 4
GND
12 PVCC
11 BGATE
10 PGND
9 BSOC
5678
Features
• Wide input voltage range: +7.0V to +25.0V
• High performance R3 technology delivers extremely fast
transient response
• +0.6V Internal Reference
- ±0.6% tolerance over the commercial temperature
Range (0°C to +70°C)
- ±1.0% tolerance over the industrial temperature range
(-40°C to +85°C)
• Output voltage range: +0.6V to VCC-0.3V
• Selectable forced continuous conduction mode or diode
emulation mode
• Integrated MOSFET drivers with shoot-through protection
• External type-two loop compensation
• Internal 5V low-dropout regulator with Integrated boot-
strap diode
• Programmable PWM frequency: 200kHz to 600kHz
• PWM minimum frequency above audible spectrum
• Internal digital soft-start with prebiased startup capability
• Power good monitor with fault identification by PGOOD
pull down resistance
• Lossless, programmable overcurrent protection
- Uses bottom-side MOSFET’s rDS(ON)
• Undervoltage protection, soft crowbar overvoltage
protection and over-temperature protection
• Pb-free plus anneal available (RoHS compliant)
Applications
• Telecom/datacom applications
• Industrial applications
• Distributed DC/DC power architecture
• Point-of-load modules
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL8106
Electrical Specifications Recommended Operating Conditions, unless otherwise noted specifications in bold are valid for process,
temperature, and line operating conditions.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
PWM
Frequency Range
FOSC
FAUDIO
FCCM = 5V
FCCM = GND; ISL8106CRZ
FCCM = GND; ISL8106IRZ
200 600 kHz
21 28
kHz
20 28
kHz
Frequency-Set Accuracy
VO Range
VO Input Leakage Current
VVO
IVO
FOSC = 300kHz; ISL8106CRZ
FOSC = 300kHz; ISL8106IRZ
VO = 0.60V
VO = 3.30V
-10 +10 %
-12 +12 %
0.60 3.30 V
1.3 μA
7.0 μA
ERROR AMPLIFIER
FB Input Bias Current
COMP Source Current
COMP Sink Current
COMP High Clamp Voltage
COMP Low Clamp Voltage
GATE DRIVER
IFB
ICOMPSRC
ICOMPSNK
VCOMPHC
VCOMPLC
FB = 0.60V
FB = 0.40V, COMP = 3.20V
FB = 0.80V, COMP = 0.30V
FB = 0.40V, Sink 50μA
FB = 0.80V, Source 50μA
3.10
0.09
± 20
2.5
0.3
3.40
0.15
3.65
0.21
nA
mA
mA
V
V
TGATE Pull-Up Resistance
TGATE Source Current
TGATE Sink Resistance
TGATE Sink Current
BGATE Pull-Up Resistance
BGATE Source Current
BGATE Sink Resistance
BGATE Sink Current
Delay From TGATE Falling to BGATE
Rising
Delay From BGATE Falling to TGATE
Rising
BOOTSTRAP DIODE
RTGATEPU 200mA Source Current (Note 3)
ITGATESRC VTGATE to LX = 2.5V
RTGATEPD 250mA Sink Current (Note 3)
ITGATESNK VTGATE to LX = 2.5V
RBGATEPU 250mA Source Current (Note 3)
IBGATESRC VBGATE to PGND = 2.5V
RBGATEPD 250mA Sink Current (Note 3)
IBGATESNK VBGATE to PGND = 2.5V
tTGATEFBG TGATE falling to BGATE rising
ATER
tBGATEFTG BGATE falling to TGATE rising
ATER
1.0 1.5
2.0
1.0 1.5
2.0
1.0 1.5
2.0
0.5 0.9
4.0
21
14
Ω
A
Ω
A
Ω
A
Ω
A
ns
ns
Forward Voltage
Reverse Leakage
POWER GOOD
VF PVCC = 5V, IF = 2mA
IR VR = 25V
0.58 V
0.2 μA
PGOOD Pull Down Impedance
PGRSS
PGRUV
PGRSS
PGRUV
PGROV
PGOOD = 5mA Sink; ISL8106CRZ
PGOOD = 5mA Sink; ISL8106IRZ
PGOOD = 5mA Sink; ISL8106CRZ
PGOOD = 5mA Sink; ISL8106IRZ
75 95 115 Ω
67 95 118 Ω
50 63 78
45 63 81
Ω
Ω
PGROC
PGOOD = 5mA Sink; ISL8016CRZ
PGOOD = 5mA Sink; ISL8106IRZ
25 32 40
22 32 43
Ω
Ω
PGOOD Leakage Current
PGOOD Maximum Sink Current
IPGOOD PGOOD = 5V
<0.1 1.0
5.0
μA
mA
5 FN9283.1
November 10, 2006
5 Page 
ISL8106
levels. Keep the metal runs from the LX terminals to the
output inductor short. The power plane should support the
input power and output power nodes. Use copper filled
polygons on the top and bottom circuit layers for the LX
nodes. Use the remaining printed circuit layers for small
signal wiring.
Locate the ISL8106 within 2 to 3 inches of the MOSFETs, Q1
and Q2 (1 inch or less for 500kHz or higher operation). The
circuit traces for the MOSFETs’ gate and source connections
from the ISL8106 must be sized to handle up to 4A peak
current. Provide local VCC decoupling between VCC and
GND pins. Locate the capacitor, CBOOT as close as practical
to the BOOT pin and the phase node.
Programming the Output Voltage
When the converter is in regulation there will be 600mV from
the FB pin to the GND pin. Connect a two-resistor voltage
divider across the VO pin and the GND pin with the output
node connected to the FB pin. Scale the voltage-divider
network such that the FB pin is 600mV with respect to the
GND pin when the converter is regulating at the desired
output voltage.
Programming the output voltage can be written as:
VREF
=
VO
U
T
•
------------R----B----O-----T---T----O----M---------------
RTOP + RBOTTOM
(EQ. 5)
Where:
- VOUT is the desired output voltage of the converter.
- VREF is the voltage that the converter regulates to at the
FB pin.
- RTOP is the voltage-programming resistor that connects
from the FB pin to the VO pin. It is usually chosen to set
the gain of the control-loop error amplifier. It follows that
RBOTTOM will be calculated based upon the already
selected value of RTOP.
- RBOTTOM is the voltage-programming resistor that
connects from the FB pin to the GND pin.
Calculating the value of RBOTTOM can now be written as:
RBOTTOM
=
--V----R----E----F----•---R----T----O-----P---
VOUT – VREF
(EQ. 6)
Programming the PWM Switching Frequency
The PWM switching frequency FOSC is programmed by the
resistor RFSET that is connected from the FSET pin to the
GND pin. Programming the approximate PWM switching
frequency can be written as:
FOSC
=
------------------------------1--------------------------------
60 • RFSET • [1 × 10–12]
(EQ. 7)
Estimating the value of RFSET can now be written as:
RFSET
=
---------------------------1----------------------------
60 • FOSC • [1×10–12]
(EQ. 8)
Where:
- FOSC is the PWM switching frequency.
- RFSET is the FOSC programming resistor.
- 60 x [1 x 10-12] is a constant.
Selection of the LC Output Filter
The duty cycle of a buck converter is ideally a function of the
input voltage and the output voltage. This relationship can be
written as:
D(VIN)
=
V-----O----U----T--
VIN
(EQ. 9)
Where:
- D is the PWM duty cycle.
- VIN is the input voltage to be converted.
- VOUT is the regulated output voltage of the converter.
The output inductor peak-to-peak ripple current can be
written as:
IPP
=
V-----O----U----T-----•--[---1-----–----D-----(--V----I--N-----)--]
FOSC • LO
(EQ. 10)
Where:
- IPP is the peak-to-peak output inductor ripple current.
- FOSC is the PWM switching frequency.
- LO is the nominal value of the output inductor.
A typical step-down DC/DC converter will have an IPP of
20% to 40% of the nominal DC output load current. The
value of IPP is selected based upon several criteria such as
MOSFET switching loss, inductor core loss, and the
resistance the inductor winding, DCR. The DC copper loss of
the inductor can be estimated by:
PCOPPER = [ILOAD]2 • DCR
(EQ. 11)
The inductor copper loss can be significant in the total
system power loss. Attention has to be given to the DCR
selection. Another factor to consider when choosing the
inductor is its saturation characteristics at elevated
temperature. A saturated inductor could cause destruction of
circuit components, as well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance CO
into which ripple current IPP can flow. Current IPP develops a
corresponding ripple voltage VPP across CO, which is the
sum of the voltage drop across the capacitor ESR and of the
voltage change stemming from charge moved in and out of
the capacitor. These two voltages can be written as:
ΔVESR = IPP • ESR
(EQ. 12)
and
ΔVC
=
--------------I-P----P---------------
8 • CO • FOSC
(EQ. 13)
If the output of the converter has to support a load with high
pulsating current, several capacitors will need to be
11 FN9283.1
November 10, 2006
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ISL8106.PDF ] | |
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