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PDF ISL6609A Data sheet ( Hoja de datos )
| Número de pieza | ISL6609A | |
| Descripción | Synchronous Rectified MOSFET Driver | |
| Fabricantes | Intersil Corporation | |
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Data Sheet
ISL6609, ISL6609A
March 6, 2006
FN9221.1
Synchronous Rectified MOSFET Driver
The ISL6609, ISL6609A is a high frequency, MOSFET driver
optimized to drive two N-Channel power MOSFETs in a
synchronous-rectified buck converter topology. This driver
combined with an Intersil ISL63xx or ISL65xx multiphase
PWM controller forms a complete single-stage core-voltage
regulator solution with high efficiency performance at high
switching frequency for advanced microprocessors.
The IC is biased by a single low voltage supply (5V),
minimizing driver switching losses in high MOSFET gate
capacitance and high switching frequency applications.
Each driver is capable of driving a 3nF load with less than
10ns rise/fall time. Bootstrapping of the upper gate driver is
implemented via an internal low forward drop diode,
reducing implementation cost, complexity, and allowing the
use of higher performance, cost effective N-Channel
MOSFETs. Adaptive shoot-through protection is integrated
to prevent both MOSFETs from conducting simultaneously.
The ISL6609, ISL6609A features 4A typical sink current for
the lower gate driver, enhancing the lower MOSFET gate
hold-down capability during PHASE node rising edge,
preventing power loss caused by the self turn-on of the lower
MOSFET due to the high dV/dt of the switching node.
The ISL6609, ISL6609A also features an input that
recognizes a high-impedance state, working together with
Intersil multiphase PWM controllers to prevent negative
transients on the controlled output voltage when operation is
suspended. This feature eliminates the need for the schottky
diode that may be utilized in a power system to protect the
load from negative output voltage damage. In addition, the
ISL6609A’s bootstrap function is designed to prevent the
BOOT capacitor from overcharging, should excessively large
negative swings occur at the transitions of the PHASE node.
Features
• Drives Two N-Channel MOSFETs
• Adaptive Shoot-Through Protection
• 0.4Ω On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency
- Fast Output Rise and Fall
- Ultra Low Three-State Hold-Off Time (20ns)
• ISL6605 Replacement with Enhanced Performance
• BOOT Capacitor Overcharge Prevention (ISL6609A)
• Low VF Internal Bootstrap Diode
• Low Bias Supply Current
• Enable Input and Power-On Reset
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Core Voltage Supplies for Intel® and AMD®
Microprocessors
• High Frequency Low Profile High Efficiency DC/DC
Converters
• High Current Low Voltage DC/DC Converters
• Synchronous Rectification for Isolated Power Supplies
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved. Intel® is a registered trademark of Intel Corporation.
AMD® is a registered trademark of Advanced Micro Devices, Inc. All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6609, ISL6609A
Electrical Specifications These specifications apply for TA = -40°C to 100°C, unless otherwise noted (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP
UGATE Turn-On Propagation Delay
LGATE Turn-On Propagation Delay
Three-state to UG/LG Rising Propagation
Delay
tPDHU
tPDHL
tPTS
VVCC = 5V, Outputs Unloaded
VVCC = 5V, Outputs Unloaded
VVCC = 5V, Outputs Unloaded
- 18
- 23
- 20
OUTPUT
Upper Drive Source Resistance
RUG_SRC 250mA Source Current
Upper Drive Sink Resistance
RUG_SNK 250mA Sink Current
Lower Drive Source Resistance
RLG_SRC 250mA Source Current
Lower Drive Sink Resistance
RLG_SNK 250mA Sink Current
NOTE:
4. Guaranteed by Characterization. Not 100% tested in production.
- 1.0
- 1.0
- 1.0
- 0.4
MAX
-
-
-
2.5
2.5
2.5
1.0
UNITS
ns
ns
ns
Ω
Ω
Ω
Ω
Functional Pin Description
Note: Pin numbers refer to the SOIC package. Check
diagram for corresponding QFN pinout.
UGATE (Pin 1)
Upper gate drive output. Connect to gate of high-side
N-Channel power MOSFET. A gate resistor is never
recommended on this pin, as it interferes with the operation
shoot-through protection circuitry.
BOOT (Pin 2)
Floating bootstrap supply pin for the upper gate drive.
Connect a bootstrap capacitor between this pin and the
PHASE pin. The bootstrap capacitor provides the charge
used to turn on the upper MOSFET. See the Bootstrap
Considerations section for guidance in choosing the
appropriate capacitor value.
PWM (Pin 3)
The PWM signal is the control input for the driver. The PWM
signal can enter three distinct states during operation, see the
Three-state PWM Input section for further details. Connect this
pin to the PWM output of the controller.
GND (Pin 4)
Ground pin. All signals are referenced to this node.
LGATE (Pin 5)
Lower gate drive output. Connect to gate of the low side
N-Channel power MOSFET. A gate resistor is never
recommended on this pin, as it interferes with the operation
shoot-through protection circuitry.
VCC (Pin 6)
Connect this pin to a +5V bias supply. Locally bypass with a
high quality ceramic capacitor to ground.
EN (Pin 7)
Enable input pin. Connect this pin high to enable and low to
disable the driver.
PHASE (Pin 8)
Connect this pin to the source of the upper MOSFET. This
pin provides the return path for the upper gate driver current.
Thermal Pad (in QFN only)
The metal pad underneath the center of the IC is a thermal
substrate. The PCB “thermal land” design for this exposed
die pad should include vias that drop down and connect to
one or more buried copper plane(s). This combination of
vias for vertical heat escape and buried planes for heat
spreading allows the QFN to achieve its full thermal
potential. This pad should be either grounded or floating,
and it should not be connected to other nodes. Refer to
TB389 for design guidelines.
5 FN9221.1
March 6, 2006
5 Page 
ISL6609, ISL6609A
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A- D
SEATING PLANE
A
L
h x 45°
-C-
e A1
B
0.25(0.010) M C A M B S
α
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1
0.0040 0.0098 0.10
0.25
-
B
0.013 0.020 0.33
0.51
9
C
0.0075 0.0098 0.19
0.25
-
D
0.1890 0.1968 4.80
5.00
3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC
1.27 BSC
-
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L
0.016 0.050 0.40
1.27
6
N8
87
α 0° 8° 0° 8° -
Rev. 1 6/05
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11 FN9221.1
March 6, 2006
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ISL6609A.PDF ] | |
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