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PDF ISL6612 Data sheet ( Hoja de datos )
| Número de pieza | ISL6612 | |
| Descripción | (ISL6612 / ISL6613) Advanced Synchronous Rectified Buck MOSFET Drivers | |
| Fabricantes | Intersil Corporation | |
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Data Sheet
Advanced Synchronous Rectified Buck
MOSFET Drivers with Protection Features
The ISL6612 and ISL6613 are high frequency MOSFET
drivers specifically designed to drive upper and lower power
N-Channel MOSFETs in a synchronous rectified buck
converter topology. These drivers combined with HIP63xx or
ISL65xx Multi-Phase Buck PWM controllers and N-Channel
MOSFETs form complete core-voltage regulator solutions for
advanced microprocessors.
The ISL6612 drives the upper gate to 12V, while the lower
gate can be independently driven over a range from 5V to
12V. The ISL6613 drives both upper and lower gates over a
range of 5V to 12V. This drive-voltage provides the flexibility
necessary to optimize applications involving trade-offs
between gate charge and conduction losses.
An advanced adaptive zero shoot-through protection is
integrated to prevent both the upper and lower MOSFETs
from conducting simultaneously and to minimize the dead
time. These products add an over-voltage protection feature
operational before VCC exceeds its turn-on threshold, at
which the PHASE node is connected to the gate of the low
side MOSFET (LGATE). The output voltage of the converter
is then limited by the threshold of the low side MOSFET,
which provides some protection to the microprocessor if the
upper MOSFET(s) is shorted during startup. The over-
temperature protection feature prevents failures resulting
from excessive power dissipation by shutting off the outputs
when its junction temperature exceeds 150°C (typically). The
driver resets once its junction temperature returns to 108°C
(typically).
These drivers also feature a three-state PWM input which,
working together with Intersil’s multi-phase PWM controllers,
prevents a negative transient on the output voltage when the
output is shut down. This feature eliminates the Schottky
diode that is used in some systems for protecting the load
from reversed output voltage events.
ISL6612, ISL6613
July 25, 2005
FN9153.5
Features
• Pin-to-pin Compatible with HIP6601 SOIC family for Better
Performance and Extra Protection Features
• Dual MOSFET Drives for Synchronous Rectified Bridge
• Advanced Adaptive Zero Shoot-Through Protection
- Body Diode Detection
- Auto-zero of rDS(ON) Conduction Offset Effect
• Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency
• 36V Internal Bootstrap Schottky Diode
• Bootstrap Capacitor Overcharging Prevention
• Supports High Switching Frequency (up to 2MHz)
- 3A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
• Three-State PWM Input for Output Stage Shutdown
• Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement
• Pre-POR Over-Voltage Protection
• VCC Undervoltage Protection
• Over Temperature Protection (OTP) with 42°C Hysteresis
• Expandable Bottom Copper Pad for Enhanced Heat
Sinking
• Dual Flat No-Lead (DFN) Package
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Core Regulators for Intel® and AMD® Microprocessors
• High Current DC-DC Converters
• High Frequency and High Efficiency VRM and VRD
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Briefs TB400 and TB417 for Power Train
Design, Layout Guidelines, and Feedback Compensation
Design
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6612, ISL6613
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Supply Voltage (PVCC) . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3V
BOOT Voltage (VBOOT-GND). . . . . . . . . . . . . . . . . . . . . . . . . . . .36V
Input Voltage (VPWM) . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 7V
UGATE. . . . . . . . . . . . . . . . . . . VPHASE - 0.3VDC to VBOOT + 0.3V
VPHASE - 3.5V (<100ns Pulse Width, 2µJ) to VBOOT + 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . GND - 0.3VDC to VPVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to VPVCC + 0.3V
PHASE. . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3VDC to 15VDC
GND - 8V (<400ns, 20µJ) to 30V (<200ns, VBOOT-GND<36V)
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD
Thermal Information
Thermal Resistance
θJA (°C/W) θJC (°C/W)
SOIC Package (Note 1) . . . . . . . . . . . . 100
N/A
EPSOIC Package (Notes 2, 3 . . . . . . .
50
7
DFN Package (Notes 2, 3) . . . . . . . . . .
48
7
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . 125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V ±10%
Supply Voltage Range, PVCC . . . . . . . . . . . . . . . . 5V to 12V ±10%
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted.
PARAMETER
SYMBOL
TEST CONDITIONS
VCC SUPPLY CURRENT
Bias Supply Current
Gate Drive Bias Current
POWER-ON RESET AND ENABLE
IVCC
IVCC
IPVCC
IPVCC
ISL6612, fPWM = 300kHz, VVCC = 12V
ISL6613, fPWM = 300kHz, VVCC = 12V
ISL6612, fPWM = 1MHz, VVCC = 12V
ISL6613, fPWM = 1MHz, VVCC = 12V
ISL6612, fPWM = 300kHz, VPVCC = 12V
ISL6613, fPWM = 300kHz, VPVCC = 12V
ISL6612, fPWM = 1MHz, VPVCC = 12V
ISL6613, fPWM = 1MHz, VPVCC = 12V
VCC Rising Threshold
VCC Rising Threshold
VCC Falling Threshold
VCC Falling Threshold
PWM INPUT (See Timing Diagram on Page 6)
TA = 0°C to 85°C
TA = -40°C to 85°C
TA = 0°C to 85°C
TA = -40°C to 85°C
Input Current
PWM Rising Threshold
IPWM
VPWM = 5V
VPWM = 0V
VCC = 12V
PWM Falling Threshold
VCC = 12V
Typical Three-State Shutdown Window
VCC = 12V
Three-State Lower Gate Falling Threshold
VCC = 12V
Three-State Lower Gate Rising Threshold
VCC = 12V
Three-State Upper Gate Rising Threshold
VCC = 12V
MIN
-
-
-
-
-
-
-
-
9.35
8.35
7.35
6.35
-
-
-
-
1.80
TYP MAX UNITS
7.2 - mA
4.5 - mA
11 - mA
5 - mA
2.5 - mA
5.2 - mA
7 - mA
13 - mA
9.80
9.80
7.60
7.60
10.00
10.00
8.00
8.00
V
V
V
V
450
-400
3.00
2.00
1.50
1.00
3.20
-
-
-
-
2.40
µA
µA
V
V
V
V
V
V
5 FN9153.5
July 25, 2005
5 Page 
ISL6612, ISL6613
Small Outline Exposed Pad Plastic Packages (EPSOIC)
N
INDEX
AREA
123
TOP VIEW
E
-B-
H
0.25(0.010) M B M
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
SIDE VIEW
α
0.10(0.004)
C
123
P1
N
P
BOTTOM VIEW
M8.15B
8 LEAD NARROW BODY SMALL OUTLINE EXPOSED PAD
PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.056 0.066 1.43
1.68
-
A1
0.001 0.005 0.03
0.13
-
B
0.0138 0.0192 0.35
0.49
9
C
0.0075 0.0098 0.19
0.25
-
D
0.189 0.196 4.80
4.98
3
E
0.150 0.157 3.31
3.39
4
e 0.050 BSC
1.27 BSC
-
H
0.230 0.244 5.84
6.20
-
h
0.010 0.016 0.25
0.41
5
L
0.016 0.035 0.41
0.64
6
N8
87
α 0° 8° 0° 8° -
P
-
0.094
-
2.387
11
P1
-
0.094
-
2.387
11
Rev. 3 6/05
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
11. Dimensions “P” and “P1” are thermal and/or electrical enhanced
variations. Values shown are maximum size of exposed pad
within lead count and body size.
11 FN9153.5
July 25, 2005
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ISL6612.PDF ] | |
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