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ISL6421A の電気的特性と機能

ISL6421AのメーカーはIntersil Corporationです、この部品の機能は「Single Output LNB Supply and Control Voltage Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL6421A
部品説明 Single Output LNB Supply and Control Voltage Regulator
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL6421A Datasheet, ISL6421A PDF,ピン配置, 機能
®
Data Sheet
March 9, 2006
ISL6421A
FN9167.3
Single Output LNB Supply and Control
Voltage Regulator with I2C Interface for
Advanced Satellite Set-top Box Designs
The ISL6421A is a highly integrated solution for providing
power and control signals from advanced satellite set-top
box (STB) modules to the low noise block (LNB). The
internal architecture of this device contains a current-mode
boost PWM and a low-noise linear regulator, along with the
circuitry required for I2C device interfacing and for providing
DiSEqC™ standard control signals to the LNB.
A regulated output voltage is available at the output terminal
(VOUT) to support the operation of the antenna port in
advanced satellite STB applications. The regulated output
may be set to either 13V or 18V by use of the voltage select
command bit (VSEL) through the I2C bus. Additionally, to
compensate for the voltage drop in the coaxial cable, the
voltage may be increased by 1V with the line length
compensation bit (LLC) feature. The device can be put into a
standby mode by means of the enable bit (EN), this disables
the PWM and Linear regulator combination and helps
conserve power.
The input to the linear regulator is derived from the current
mode boost converter, such that the required voltage is the
sum of the output voltage and the linear regulator drop (1.0V
typical). This ensures that the power dissipation is minimized
and maintains a constant voltage drop across the linear pass
element, while permitting an adequate voltage range for tone
injection.
The device is capable of providing 450mA (typical). The
overcurrent limit is either digitally or resistor programmable.
Pinout
ISL6421A (QFN) TOP VIEW
32 31 30 29 28 27 26 25
PGND 1
24 CPSWOUT
NC 2
23 NC
SGND 3
22 NC
SEL18V 4
21 NC
NC 5
20 AGND
BYPASS 6
19 VOUT
PGND 7
18 DSQIN
GATE 8
17 TCAP
9 10 11 12 13 14 15 16
Features
• Switch-Mode Power Converter for Lowest Dissipation
- Boost PWM with >92% Efficiency
- Selectable 13V or 18V Outputs
- Digital Cable Length Compensation (1V)
- Vsw tracks Vout ensures low dissipation
• I2C Compatible Interface for Remote Device Control
- Registered Slave Address 0001 00XX
- Fully Functional 3.3V, 5V Operation up to 400kHz
• Built-In Tone Oscillator Factory Trimmed to 22kHz
- Facilitates DiSEqC™ (EUTELSAT) Encoding
- External Modulation input DSQIN
• Internal Over Temperature Protection and Diagnostics
• Internal Overload and Over Temperature Flags
(Visible on I2C)
• Output Back-Bias Protection to 24V
• LNB Short-Circuit Protection and Diagnostics
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Product Outline
- Near Chip-Scale Package Footprint
• External Pins to Select 13V/18V Options
• Pb-Free Available (RoHS Compliant)
Applications
• LNB Power Supply and Control for Satellite Set-Top Box
References
• Tech Brief 389 (TB389) - “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”; Available
on the Intersil website, www.intersil.com
Ordering Information
PART
NUMBER*
PART
MARKING
TEMP.
RANGE
(°C)
PKG.
PACKAGE DWG. #
ISL6421AER ISL6421AER -20 to 85 32 Ld 5x5 QFN L32.5x5
ISL6421AERZ ISL6421AERZ -20 to 85 32 Ld 5x5 QFN L32.5x5
(Note)
(Pb-free)
*Add -T for tape and reel package.
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL6421A pdf, ピン配列
Typical Application Schematic
NOTE: SGND and PGND to be shorted as close to U1 at layout


3Pages


ISL6421A 電子部品, 半導体
ISL6421A
Functional Pin Description (Continued)
SYMBOL
FUNCTION
VCC
Main power supply to the chip.
GATE
This is the device output of the PWM. This high current driver output is capable of driving the gate of a power FET.
This output is actively held low when Vcc is below the UVLO threshold.
VOUT
Output voltage for the LNB.
ADDRESS
Address pin to select two different addresses per voltage level at this pin.
COMP
Error amp output used for compensation.
FB Feedback pin for the PWM.
CPVOUT, CPSWIN,
CPSWOUT
Charge pump connections.
SEL18V
When connected HIGH, this pin will change the output of the PWM to 18V. Only available on the QFN package option.
Functional Description
The ISL6421A is a single output voltage regulator controlled
by an I2C bus, making it an ideal choice for advanced
satellite set-top box and personal video recorder
applications. Both supply and control voltage outputs for a
low noise block (LNB) are available simultaneously in any
output configuration. The device utilizes a built-in DC/DC
step-converter which, from a single supply source ranging
from 8V to 14V, generates the voltage that enables the linear
post-regulator to work with a minimum of dissipated power.
An undervoltage lockout circuit disables the circuit when
VCC drops below a fixed threshold (7.5V typ).
DiSEqC Encoding
The internal oscillator is factory-trimmed to provide a tone of
22kHz in accordance with DiSeqC standards. No further
adjustment is required. The 22kHz oscillator can be
controlled either by the I2C interface (ENT bit) or by a
dedicated pin (DSQIN) that allows immediate DiSEqC data
encoding for the LNB. All the functions of this IC are
controlled via the I2C bus by writing to the system registers
(SR). The same registers can be read back, and two bits will
report the diagnostic status. The internal oscillator operates
the converters at ten times the tone frequency. The device
offers full I2C compatible functionality, 3.3V or 5V, and up to
400kHz operation.
If the Tone Enable (ENT) bit is set LOW through I2C, then
the DSQIN terminal activates the internal tone signal,
modulating the dc output with a 0.3V, 22kHz, symmetrical
waveform. The presence of this signal usually gives the LNB
information about the band to be received.
Burst coding of the 22kHz tone can be accomplished due to
the fast response of the DSQIN input and rapid tone
response. This allows implementation of the DiSEqC
(EUTELSAT) protocols.
When the ENT bit is set HIGH, a continuous 22kHz tone is
generated regardless of the DSQIN pin logic status. The
ENT bit must be set LOW when the DSQIN pin is used for
DiSEqC encoding.
Linear Regulator
The output linear regulator will sink and source current. This
feature allows full modulation capability into capacitive loads
as high as 0.25µF. In order to minimize the power
dissipation, the output voltage of the internal step-up
converter is adjusted to allow the linear regulator to work at
minimum dropout.
When the device is put in the shutdown mode (EN = LOW),
the PWM power block is disabled. When the regulator block
is active (EN = HIGH), the output can be logic controlled to
be 13V or 18V (typical) by means of the VSEL bit (Voltage
Select) for remote controlling of non-DiSEqC LNBs.
Additionally, it is possible to increment by 1V (typical) the
selected voltage value to compensate for the excess voltage
drop along the coaxial cable (LLC bit HIGH).
Output Timing
The programmed output voltage rise and fall times can be
set by an external capacitor. The output rise and fall times
will be approximately 3400 times the TCAP value. For the
recommended range of 0.47µF to 2.2µF, the rise and fall
time would be 1.6ms to 7.6ms. Using a 0.47µF capacitor
insures the PWM stays below its overcurrent threshold when
charging a 120µF VSW filter cap during the worst case 13V
to 19V transition. A typical value of 1.0µF is recommended.
This feature affects the programmed voltage rise and fall
times.
Current Limiting
The current limiting block can operate either statically
(simple current clamp) or dynamically. The threshold is
between 500mA and 625mA. When the DCL (Dynamic
Current Limiting) bit is set to LOW, the overcurrent protection
circuit works dynamically. That is, as soon as an overload is
detected, the output is shut down for a time TOFF, typically
6 FN9167.3
March 9, 2006

6 Page



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部品番号部品説明メーカ
ISL6421

Single Output LNB Supply and Control Voltage Regulator with I2C Interface for Advanced Satellite Set-top Box Designs

Intersil Corporation
Intersil Corporation
ISL6421A

Single Output LNB Supply and Control Voltage Regulator

Intersil Corporation
Intersil Corporation
ISL6421ER

Single Output LNB Supply and Control Voltage Regulator with I2C Interface for Advanced Satellite Set-top Box Designs

Intersil Corporation
Intersil Corporation


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