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ISL95310 の電気的特性と機能

ISL95310のメーカーはIntersil Corporationです、この部品の機能は「128 Taps Up/Down Interface」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL95310
部品説明 128 Taps Up/Down Interface
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL95310 Datasheet, ISL95310 PDF,ピン配置, 機能
®
Datasheet
ISL95310
Digitally Controlled Potentiometer (XDCP™)
May 6, 2005
FN8083.0
Terminal Voltage 0V to 13.2V, 128 Taps
Up/Down Interface
The Intersil ISL95310 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by an Up/Down interface.
The potentiometer is implemented by a resistor array
composed of 127 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The wiper of each
potentiometer has an associated volatile Wiper Counter
Register (WR) and a non-volatile Initial Value Register (IVR)
that can be directly written to and read by the user. The
contents of the WR controls the position of the wiper on the
resistor array through the switches. At power-up, the device
recalls the contents of the default data registers to the
corresponding WR. The position of the wiper element is
controlled by the CS, U/D, and INC inputs. The position of
the wiper can be stored in nonvolatile memory and then be
recalled upon a subsequent power-up operation.
The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
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applications including:
• LCD contrast control
• Parameter and bias adjustments
• Mechanical potentiometer replacement
• Industrial and automotive control
Ordering Information
PART NUMBER
RESISTANCE
OPTION
(Ω)
ISL95310WIU10Z
(See Note)
10K
ISL95310UIU10Z
(See Note)
50K
Add “-TK” suffix for tape and reel.
TEMP
RANGE
(°C)
-40 to +85
-40 to +85
PACKAGE
10 Ld MSOP
(Pb-Free)
10 Ld MSOP
(Pb-Free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-
free material sets; molding compounds/die attach materials and
100% matte tin plate termination finish, which are RoHS compliant
and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• Non-volatile solid-state potentiometer
• Up/down interface with chip select enable
• DCP terminal voltage, 0 to +13.2V
• 128 wiper tap points - 0.8% resolution
- Wiper position stored in nonvolatile memory and
recalled on power-up
• 127 resistive elements
- Temperature compensated
- Low wiper resistance 70Ω typical @ 3.3V
• Low power CMOS
- Standby current, 2µA at VCC = +3.6V
• High reliability
- Endurance, 200,000 data changes per bit
- Register data retention 50 years @ T 75°C
• RTOTAL values = 10kΩ, 50kΩ
• 10-lead MSOP package
- Pb-free plus anneal available (RoHS compliant)
Pinout
ISL95310
(10 LD MSOP)
TOP VIEW
U/D
GND
VCC
CS
NC
1
2
3
4
5
10 INC
9 V+
8 RL
7 RW
6 RH
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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ISL95310 pdf, ピン配列
ISL95310
Absolute Maximum Ratings
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, INC, U/D
with respect to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
Voltage on V+ (referenced to GND) . . . . . . . . . . . . . . . . . . . . +13.2V
ΔV = |V(RH)-V(RL)| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V+
RH, RL, RW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V+
Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . +300°C
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Power rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mW
Recommended Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V to 13.2V
Wiper current of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Analog Specifications Over recommended operating conditions unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (Note 1) MAX
RTOTAL RH to RL resistance
W option
U option
10
50
VRH
RW
CH/CL/CW
RH to RL resistance tolerance
RH terminal voltage
VRL = 0V
Wiper resistance
V+ = 12V, wiper current = V+ / RTOTAL
Potentiometer Capacitance (Note 13)
-20 +20
0 V+
70 200
10/10/
25
ILkgDCP Leakage on DCP pins
Voltage at pin from GND to V+
VOLTAGE DIVIDER MODE (0V @ RL; V+ @ RH; measured at RW, unloaded)
INL Integral non-linearity
(Note 6)
0.1 1
-1 1
DNL
Differential non-linearity
(Note 5)
W option
U option
-0.75
-0.5
0.75
0.5
ZSerror Zero-scale error
(Note 3)
U option
W option
017
0 0.5 2
FSerror Full-scale error
(Note 4)
U option
W option
-7 -1
0
-2 -1 0
TCV (Note 7) Ratiometric Temperature Coefficient DCP register set to 40 hex
±4
RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected)
RINL Integral non-linearity
(Note 11)
DCP register set between 20 hex and 7F hex;
monotonic over all tap positions
-1
1
RDNL Differential non-linearity
(Note 10)
W option
U option
-0.75
-0.5
0.75
0.5
Roffset Offset
(Note 9)
DCP Register set to 00 hex, W option
017
DCP Register set to 00 hex, U option
0 0.5 2
TCR
Resistance Temperature Coefficient DCP register set between 20 hex and 7F hex
(Note 12)
±45
UNIT
kΩ
kΩ
%
V
Ω
pF
µA
LSB
(Note 2)
LSB
(Note 2)
LSB
(Note 2)
LSB
(Note 2)
ppm/°C
MI
(Note 8)
MI
(Note 8)
MI
(Note 8)
MI
(Note 8)
ppm/°C
3 FN8083.0
May 6, 2005


3Pages


ISL95310 電子部品, 半導体
A.C. Timing
CS
tCI
INC
U/D
tIW
RW
tCYC
tIL
tIH
tID
ISL95310
tIC
tDI
tCPHS
(3)
MI
90% 90%
10%
tCPHNS
tF tR
Power Up and Down Requirements
In order to prevent unwanted tap position changes, or an
inadvertent store, bring the CS and INC high before or
concurrently with the VCC pin on power-up. The
potentiometer voltages must be applied after this sequence
is completed. During power-up, the data sheet parameters
for the DCP do not fully apply until 1ms after VCC reaches its
final value. The VCC ramp spec is always in effect.
Pin Descriptions
RH and RL
The high (RH) and low (RL) terminals of the ISL95310 are
equivalent to the fixed terminals of a mechanical
potentiometer. The terminology of RL and RH references the
relative position of the terminal in relation to wiper movement
direction selected by the U/D input and not the voltage
potential on the terminal.
RW
RW is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the
U/D input.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
6
CS is returned HIGH while the INC input is also HIGH. After
the store operation is complete the ISL95310 will be placed
in the low power standby mode until the device is selected
once again.
Principles of Operation
There are three sections of the ISL95310: the input control,
counter and decode section; the nonvolatile memory; and
the resistor array. The input control section operates just like
an up/down counter. The output of this counter is decoded to
turn on a single electronic switch connecting a point on the
resistor array to the wiper output. Under the proper
conditions the contents of the counter can be stored in
nonvolatile memory and retained for future use. The resistor
array is comprised of 127 individual resistors connected in
series. At either end of the array and between each resistor
is an electronic switch that transfers the potential at that
point to the wiper.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions. If
the wiper is moved several positions, multiple taps are
connected to the wiper for tIW (INC to VW change). The
RTOTAL value for the device can temporarily be reduced by
a significant amount if the wiper is moved several positions.
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the wiper is set to the value last stored.
FN8083.0
May 6, 2005

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共有リンク

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部品番号部品説明メーカ
ISL95310

128 Taps Up/Down Interface

Intersil Corporation
Intersil Corporation
ISL95311

128 Taps I2C Interface

Intersil Corporation
Intersil Corporation


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