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PDF ISL9014A Data sheet ( Hoja de datos )
| Número de pieza | ISL9014A | |
| Descripción | Dual LDO | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
January 30, 2007
ISL9014A
FN6438.0
Dual LDO with Low Noise, Low IQ, and
High PSRR
ISL9014A is a high performance dual LDO capable of
sourcing 300mA current from both outputs. The device has a
low standby current and high-PSRR and is stable with output
capacitance of 1µF to 10µF with ESR of up to 200mΩ.
A reference bypass pin allows an external capacitor for
adjusting a noise filter for low noise and high PSRR
applications.
The quiescent current is typically only 45µA with both LDOs
enabled and active. Separate enable pins control each
individual LDO output. When both enable pins are low, the
device is in shutdown, typically drawing less than 0.1µA.
Several combinations of voltage outputs are standard.
Others are available on request. Output voltage options for
each LDO range from 1.2V to 3.6V.
Pinout
ISL9014A
(10 LD 3x3 DFN)
TOP VIEW
VIN 1
EN1 2
EN2 3
CBYP 4
NC 5
10 VO1
9 VO2
8 NC
7 NC
6 GND
Features
• Integrates two high performance LDOs
- VO1 - 300mA output
- VO2 - 300mA output
• Excellent transient response to large current steps
• Excellent load regulation: <1% voltage change across full
range of load current
• High PSRR: 70dB @ 1kHz
• Wide input voltage capability: 2.3V to 6.5V
• Extremely low quiescent current: 45µA (both LDOs active)
• Low dropout voltage: typically 200mV @ 300mA
• Low output noise: typically 30µVRMS @ 100µA (1.5V)
• Stable with 1µF to 10µF ceramic capacitors
• Separate enable pins for each LDO
• Soft-start to limit input current surge during enable
• Current limit and overheat protection
• ±1.8% accuracy over all operating conditions
• Tiny 10 Ld 3mmx3mm DFN package
• -40°C to +85°C operating temperature range
• Pin compatible with Micrel MIC2211
• Pb-free plus anneal available (RoHS compliant)
Applications
• PDAs, Cell Phones and Smart Phones
• Portable Instruments, MP3 Players
• Handheld Devices including Medical Handhelds
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2007. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL9014A
Typical Performance Curves
0.8
VO = 3.3V
0.6 ILOAD = 0mA
0.4
0.2
-40°C
0.0
+25°C
-0.2
-0.4 +85°C
-0.6
-0.8
3.4 3.8 4.2 4.6 5.0 5.4 5.8 6.2
INPUT VOLTAGE (V)
FIGURE 1. OUTPUT VOLTAGE vs INPUT VOLTAGE
(3.3V OUTPUT)
6.6
0.10
0.08
0.06
VIN = 3.8V
VO = 3.3V
ILOAD = 0mA
0.04
0.02
0.00
-0.02
-0.04
-0.06
-0.08
-0.10
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
FIGURE 3. OUTPUT VOLTAGE CHANGE vs TEMPERATURE
2.9
IO = 0mA
2.8
VO2 = 2.8V
2.7
IO = 150mA
2.6
IO = 300mA
2.5
2.4
2.3
2.6 3.1 3.6 4.1 4.6 5.1 5.6 6.1 6.5
INPUT VOLTAGE (V)
FIGURE 5. OUTPUT VOLTAGE vs INPUT VOLTAGE
(VO2 = 2.8V)
0.10
0.08
0.06
VIN = 3.8V
VO = 3.3V
0.04
0.02
-40°C
0.00
+25°C
-0.02
-0.04
+85°C
-0.06
-0.08
-0.10 0
50 100 150 200 250 300 350 400
LOAD CURRENT - IO (mA)
FIGURE 2. OUTPUT VOLTAGE CHANGE vs LOAD CURRENT
3.4
IO = 0mA
3.3
VO = 3.3V
3.2
IO = 150mA
3.1
IO = 300mA
3.0
2.9
2.8
3.1 3.6 4.1 4.6 5.1 5.6 6.1
INPUT VOLTAGE (V)
FIGURE 4. OUTPUT VOLTAGE vs INPUT VOLTAGE
(3.3V OUTPUT)
6.5
350
300
250
VO = 2.8V
200
VO = 3.3V
150
100
50
0
0 50 100 150 200 250 300 350 400
OUTPUT LOAD (mA)
FIGURE 6. DROPOUT VOLTAGE vs LOAD CURRENT
5 FN6438.0
January 30, 2007
5 Page 
ISL9014A
Dual Flat No-Lead Plastic Package (DFN)
2X
AD
0.10 C A
2X
0.10 C B
6
INDEX
AREA
TOP VIEW
E
B
C SIDE VIEW
SEATING
PLANE
(DATUM B)
D2
D2/2
6
INDEX
AREA
12
(DATUM A)
A
A3
// 0.10 C
0.08 C
78
NX k
E2
E2/2
NX L
8
N N-1
e
(Nd-1)Xe
REF.
BOTTOM VIEW
NX b
5
0.10 M C A B
NX (b)
5
(A1)
SECTION "C-C"
CL
9L
e
CC
TERMINAL TIP
FOR ODD TERMINAL/SIDE
L10.3x3C
10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
MILLIMETERS
SYMBOL
MIN NOMINAL MAX
NOTES
A 0.85 0.90 0.95 -
A1
-
- 0.05
-
A3 0.20 REF -
b
0.20 0.25 0.30
5, 8
D
3.00 BSC
-
D2
2.33 2.38 2.43
7, 8
E
3.00 BSC
-
E2
1.59 1.64 1.69
7, 8
e
0.50 BSC
-
k 0.20 - - -
L 0.35 0.40 0.45 8
N 10 2
Nd 5 3
NOTES:
Rev. 1 4/06
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
9. COMPLIANT TO JEDEC MO-229-WEED-3 except for
dimensions E2 & D2.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11 FN6438.0
January 30, 2007
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ISL9014A.PDF ] | |
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