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PDF ISL6232 Data sheet ( Hoja de datos )

Número de pieza ISL6232
Descripción High Efficiency System Power Supply Controller
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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®
Data Sheet
April 18, 2005
ISL6232
FN9116.0
High Efficiency System Power Supply
Controller for Notebook Computers
The ISL6232 is a high efficiency, quad output controller
optimized for converting battery, wall adapter or network DC
input voltage into system supply voltages required for
portable applications. The ISL6232 includes two PWM
controllers generating 0.8V to 5.5V, or fixed 5V and 3.3V
outputs. It also features 5V and 3.3V always linear regulators
with up to 100mA output current.
ISL6232 uses constant frequency current mode PWM
control with out of phase operation for reducing the input
ripple current and the ESR requirement of the input
capacitors. Over 95% efficiency is achieved through
synchronous rectification and dual PWM/Skip mode
architecture. High light load efficiency with skip mode
extends the battery life in system standby or shutdown
mode. The 5V and 3.3V always linear regulators take their
inputs from battery or ac adapter; and, to further improve
efficiency, their outputs are switched to the 5V or 3.3V
outputs from switching regulators when 5V or 3.3V is
available. Ultrasonic pulse skipping mode maintains
switching frequency above 25kHz to eliminate the audio
noise for high light load efficiency, and fixed frequency PWM
operation mode reduces the RF interference in sensitive
applications. External loop compensation is used to optimize
the transient response with optimized external components.
An accurate current sensing resistor in series with an output
inductor, or DC resistance of the inductor is used to sense
the output current of the current ramp signal, and
overcurrent protection. A peak current detecting scheme is
used for overcurrent protection and to prevent the inductor
from saturation.
The ISL6232 has internal soft-start to control the inrush
current. The soft-stop feature avoids negative output voltage
for undervoltage protection, overcurrent protection, and
shutdown by discharging output through an internal switch,
and by damping the inductor current. The ISL6232 also
features overvoltage protection, power-up sequences, power
good output, and thermal shutdown. It has quiescent power
dissipation as low as 3.5mW.
Features
• Supply Voltage Range: 5.5V to 25V
• 3.3V and 5V Fixed or Adjustable Outputs from 0.8V to
5.5V
• 5V, 3.3V/100mA Always Linear Regulators
• Out of Phase Operation Reduces the ESR Requirement of
the Input Capacitors
±1.5% Output Voltage Accuracy over Temperature
• Fixed 300kHz Current Mode Control Architecture
• Accurate Current Sensing or DCR Current Sensing
• Internal Soft-Start and Soft-Stop Output Discharge
• Selectable Power-up Sequence
• Selectable Forced PWM, Pulse Skipping, and Ultrasonic
Pulse Skipping Mode (25kHz min)
• Peak Overcurrent Limit Prevents Inductor Saturation
• Overvoltage Protection, Undervoltage Shutdown
• Power Good Output
• Thermal shutdown
• 5µA Shutdown Current
• Integrated Bootstrap Schottky Diodes
• 3.5mW Quiescent Power Dissipation
• Pb-Free Available (RoHS Compliant)
Applications
• Notebook, Sub-notebook, and Tablet Computers
• 2-4 cell Li-Ion Battery-Powered Devices
• Dual Output Supplies for DSP, Memory, Logic and
Microprocessor
• Telecom Systems, Network servers, and Storage
Ordering Information
PART
NUMBER*
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
ISL6232CAZA
(Note 1)
-10° to 100° 28 Ld QSOP M28.15
(Pb-free)
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add “-T” for Tape and Reel.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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ISL6232 pdf
ISL6232
Electrical Specifications
PARAMETER
VIN = 12V, SHDN# = EN3 = EN5 = VCC, SKIP# = FB3 = FB5 = 0V, ILDO5 = 0mA, ILDO3 = 0mA, CREF = 0.22µF,
CLDO3 = CLDO5 = 4.7µF, TA = -10°C to +100°C, unless otherwise noted. (Continued)
TEST CONDITIONS
MIN TYP MAX UNITS
PGOOD Leakage Current
Forced to VCC
-1 1 µA
Thermal Shutdown Threshold Hysteresis
150 °C
25
INPUTS
EN3/EN5 Input Voltage
Low
0.8
Delay start threshold voltage
REF-
0.05
REF
REF+
0.2
V
High
2.4
SKIP# Input Voltage
Low
0.8
Ultrasonic skip mode threshold voltage
REF-
0.05
REF
REF+
0.2
V
High
2.4
SHDN# Input Voltage
Low
High
0.7
V
2.4
Input Leakage Current
EN3/EN5/SKIP#/SHDN#
-1 1 µA
NOTES:
2. Specifications to -10°C are guaranteed by design and not production tested.
3. Guaranteed by design.
5 FN9116.0
April 18, 2005

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ISL6232 arduino
ISL6232
PGOOD
Open drain output. Active high after soft-start cycle delay
when both outputs are above 90% of the regulated voltage;
Pull low immediately when either output is below 90% of the
regulated output.
GND
Analog ground.
VIN
This pin is the input of the internal 5V and 3.3V LDO
regulators. Connect VIN to the battery or AC adapter output.
LDO5
5V internal LDO output. LDO5 is the gate driver supply for
the external MOSFETs. It can provide a total of 100mA,
including MOSFET gate drive requirements and external
loads. If OUT5 is greater than the LDO5 switch-over
threshold, the LDO5 regulator shuts down and LDO5 pin
connects to OUT5 through a 2switch. Bypass a 4.7µF
ceramic capacitor to ground.
VCC
VCC is derived from LDO5. This pin is used to power the
internal analog integrated circuit only. The only connection to
this pin is a 0.1µF ceramic capacitor to ground.
EN3
3.3V output enable input. Connect to high for enabling 3.3V
output. Connect to low for disabling 3.3V output. When it is
connected to REF, the 3.3V output starts after 5V output
reaches regulation. Drive EN3 below the clear fault level to
reset the fault latches.
EN5
5V output enable input. Connect to high for enabling 5V
output. Connect to low for disabling to 5V output. When it is
connected to REF, the 5V output starts after 3.3V output
reaches regulation. Drive EN5 below the clear fault level to
reset the fault latches.
PHASE3, PHASE5
Phase connection pins for OUT3 and OUT5, respectively.
Connect to joint points of the high side MOSFET source,
output inductor, and low side MOSFET drain.
OUT5
Connect to the 5V output. It is used to sense the output
voltage and connect to the negative terminal of the sensing
resistor. If OUT5 is greater than the LDO5 switch-over
threshold, the LDO5 internal linear regulator shuts down and
LDO5 connects to OUT5 through a 2switch.
OUT3
Connect to the 3.3V output. It is used to sense the output
voltage and connected to the negative terminal of the
sensing resistor. If OUT3 is greater than the LDO3 switch-
over threshold, the LDO3 internal linear regulator shuts
down and LDO3 connects to OUT3 through a 2.5switch.
PGND
Power ground.
SHDN#
Shut down control input. Connect to ground, for shuting
down all internal circuitry. Connect to VIN for automatic start
up.
SKIP#
Mode selection input. Connect to ground for pulse skip
operation. Connect to VCC for forced PWM operation.
Connect to REF for ultrasonic pulse skipping operation. For
debugging purposes, SKIP# can be pulled 1V above VCC to
disable the latch-off features of overcurrent, undervoltage,
and overvoltage protections.
REF
Reference output. Bypass a 0.22µF ceramic capacitor to
ground. REF can source up to 100uA for external loads.
COMP3, COMP5
External loop compensation for OUT3 and OUT5,
respectively. Connect a resistor in series with a capacitor to
ground.
11 FN9116.0
April 18, 2005

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