DataSheet.jp

ISL54103 の電気的特性と機能

ISL54103のメーカーはIntersil Corporationです、この部品の機能は「DDC Accelerator」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL54103
部品説明 DDC Accelerator
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




このページの下部にプレビューとISL54103ダウンロード(pdfファイル)リンクがあります。

Total 7 pages

No Preview Available !

ISL54103 Datasheet, ISL54103 PDF,ピン配置, 機能
®
PRELIMINARY
Data Sheet
June 22, 2006
ISL54103
FN6303.1
DDC Accelerator (DDCA)
The ISL54103 DDC Accelerator (DDCA) is a dual active
pull-up bus terminator designed to improve data
transmission speed on the DDC 2-wire serial bus interfaces.
The DDCA detects rising input transitions with two internal
voltage references and two comparators per channel. After
the voltage on a data line crosses the first threshold
(VTRIPL), the boost pull-up current source is activated to
speed transition. After the voltage crosses the second
threshold (VTRIPH), the boost pull-up current source is
de-activated, leaving an active pull-up current of 275µA on
the line. When both channels are HIGH, the pull-up current
for both lines is reduced to 100µA to save power. Internal
logic ensures that the active and boost pull-up current
sources are not activated during downward transitions.
The level for VTRIPH is controlled by a bandgap voltage
referred to VDD. This feature makes the switching behavior
invariant for all power supply voltages between 2.7V and
5.5V.
A noise filter on each channel prevents the circuit from
responding to input transitions that do not exceed a
www.DataSheet4U.covmoltage-time threshold. To activate the boost circuit, the input
must exceed VTRIPL by 100Vns (typical) (See Figure 10).
The DDCA permits operation of the bus at frequencies up to
100kHz, despite the capacitive loads of multiple devices
and/or long PC board traces. Enhanced ESD protection on
the accelerator pins are guaranteed to withstand 8kV ESD
(HBM) events.
The DDC Accelerator provides an essential function in DDC
applications because of distributed capacitance of the DDC
wires in long video cables. By incorporating DDCA, systems
using DDC can reliably increase their bus load, allowing
longer cables, without the risk of data corruption.
Ordering Information
PART NUMBER
TAPE & TEMP RANGE
REEL
(°C)
PACKAGE
ISL54103IHZ-T7
(Note)
7” -40 to 85 5 Ld SOT-23
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• Active Termination for DDC Lines
• Enhances System Bus Signal Rise Time
• More Reliable HDCP Performance In Video Multiplexers
and Cable Extenders
• Increases Maximum Cable Length While Guaranteeing
Data Integrity
• 2.2mA Current Boost on Low to High Transitions
• 8kV ESD Protection on SDA and SCL Pins
• Wide Operating Voltage Range: 2.7V to 5.5V
• Small Package - 5 Ld SOT-23
• Pb-free Plus Anneal Available (RoHS Compliant)
Target Applications
• Video Multiplexers
• Video Cable Extenders
• Video Distribution Amplifiers
• Televisions
• Computer Monitors
• Projectors
Pinout
ISL54103
(5 LD SOT-23)
TOP VIEW
VDD
GND
N.C.
1
2
3
5 DDC1
4 DDC2
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL54103 pdf, ピン配列
ISL54103
Absolute Maximum Ratings
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 6.5V
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on Pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . 300°C
ESD Min Other Pins (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV
ESD DDC1 and DDC2 Pins (HBM) . . . . . . . . . . . . . . . . . . . . . .>8kV
Recommended Operating Conditions
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings
provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification are not implied.
For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some
performance characteristics may degrade when the device is not operated under the listed test conditions.
Electrical Specifications Over all operating conditions unless otherwise specified, Typical values are measured at VDD = 3.3V and
TA = +25°C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG PARAMETERS
VDD
Supply Voltage Range
VDD RAMP VDD Ramp Rate
IDD Supply Current
DDC1 = DDC2 = Open
IOUT_SB Standby Pull-Up Current
DDC1 = DDC2 = VDD - 1.0V
IOUT_A1 Active Pull-Up Current
DDC1 = GND; DDC2 = Open
IOUT_A2
DDC1 = Open; DDC2 = GND
IOUT_B1 Boost Pull-Up Current (Figure 2) VTRIPL < DDC1 < VTRIPH, DDC2 = Open
IOUT_B2
VTRIPL < DDC2 < VTRIPH, DDC1 = Open
VTRIPL
Input Voltage Threshold Low
VTRIPH Input Voltage Threshold High
fMAX
DDC Max Frequency
NSS
Noise Spike Suppression
(Note Figure 1) (Figure 10)
2.7
0.05
80
80
125 275
125 275
1.6 2.2
1.6 2.2
0.65 0.75
VDD - 0.60 VDD - 0.50
20
5.5
50
100
125
350
350
0.85
VDD - 0.40
100
V
V/ms
µA
µA
µA
µA
mA
mA
V
V
kHz
V-ns
NOTES:
1. Measured as area under triangular waveform above VTRIPL, with time as base and VIN as height (See Figure 10).
3 FN6303.1
June 22, 2006


3Pages


ISL54103 電子部品, 半導体
ISL54103
consumption. When either of the two signals is pulled LOW,
an active pull-up current of 275µA maintains a good VOL
noise margin.
When the bus line is released, it is pulled high by the
ISL54103 active current until the voltage exceeds the
VTRIPL level for a period of time. This voltage-time
combination filters out noise on the signal line. Once the
ISL54103 detects a valid rising edge, a 2.2mA boost current
pulls the bus line high very quickly (see Figure 8). This boost
current turns off when the input level reaches the VTRIPH
threshold and the pull-up current returns to the active level. If
both inputs are HIGH, the pull-up current drops to the
standby level of 100µA.
VTRIPH
With ISL54103 DDCA
VDD
VTRIPH
With DDCA
Without DDCA
VTRIPL
Gnd
DDC1
DDC2
>20Vns
(Typical)
t
FIGURE 10. NOISE SUPPRESSION. BOOST CURRENT
APPLIED WHEN INPUT SIGNAL EXCEEDS 20Vns
(TYPICAL)
VTRIPL
With RC
Pullup
R = 15.8K
C = 200pF
FIGURE 8. ISL54103 DDC SYSTEM BOOST PULL-UP
COMPARED TO RESISTOR PULL-UP
(VDD = 5.5V)
With ISL54103 DDCA
VTRIPH
VTRIPL
With RC
Pullup
R = 15.8K
C = 200pF
FIGURE 9. ISL54103 DDC SYSTEM BOOST PULL-UP
COMPARED TO RESISTOR PULL-UP
(VDD = 2.7V)
6 FN6303.1
June 22, 2006

6 Page



ページ 合計 : 7 ページ
 
PDF
ダウンロード
[ ISL54103 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
ISL54100

TMDS Regenerators

Intersil
Intersil
ISL54100A

TMDS Regenerators

Intersil
Intersil
ISL54101

TMDS Regenerators

Intersil
Intersil
ISL54101A

TMDS Regenerators

Intersil
Intersil


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap