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PDF ISL88716 Data sheet ( Hoja de datos )
| Número de pieza | ISL88716 | |
| Descripción | (ISL88705 - ISL88813) uP Supervisor | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
ISL88705, ISL88706, ISL88707,
ISL88708, ISL88716, ISL88813
December 6, 2006
FN8092.3
µP Supervisor with Watchdog Timer,
Power-Fail Comparator, Manual Reset and
Adjustable Power-On Reset
Designed with high reset threshold accuracy and low power
consumption, the ISL88705, ISL88706, ISL88707,
ISL88708, ISL88716 and ISL88813 devices are
microprocessor supervisors that are designed to monitor
power-supply and battery functions in microprocessor
systems. They can help to lower system cost, reduce board
space requirements and increase the reliability of systems.
These devices provide essential functions such as supply
voltage supervision by asserting a reset output during
power-up and power-down as well as during brownout
conditions. An auxiliary voltage monitor is provided for
detecting power failures warning the system of low battery
conditions or presence detection. In addition, an
independent watchdog timer helps to monitor
microprocessor activity every 1.6s (typical). An active-low
manual reset is offered and reset signals remain asserted
until VDD returns to proper operating levels.
Users can increase the nominal 200ms power-on reset time-
out
www.DataSheet4U.com
delay
by
adding
an
external
capacitor
to
the
CPOR
pin
on
the ISL88707 and ISL88708.
Features
• Fixed-Voltage Options Allow Precise Monitoring of +3.0V,
+3.3V, and +5.0V Power Supplies
• Additional Voltage Monitor for Power-Fail Detection or
Low-Battery Warning
- Monitors Voltages Down to 1.25V
- Adjustable Power-Fail Input Threshold
• Watchdog Timer Capability With 1.6s Time-out
• Both RST and RST Outputs Available
• 140ms Minimum Reset Pulse Width with Option to
Customize Using an External Capacitor
• Manual Reset Input On All Devices
• Reset Signal Valid Down to VDD = 1V
• Accurate ±1.8% Voltage Threshold
• Immune to Power-Supply Transients
• Ultra Low 10µA Maximum Supply Current at 3V
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Portable/Battery Powered Equipment
• Notebook/Desktop Computer Systems
• Designs Using DSPs, Microcontrollers or Microprocessors
• Controllers
• Intelligent Instruments
• Communications Systems
• Industrial Equipment
Pinouts
ISL88705, ISL88706
(8 LD PDIP/SOIC)
TOP VIEW
MR 1
VDD 2
GND 3
PFI 4
8 WDO
7 RST
6 WDI
5 PFO
ISL88716, ISL88813
(8 LD PDIP/SOIC)
TOP VIEW
MR 1
VDD 2
GND 3
PFI 4
8 WDO
7 RST
6 WDI
5 PFO
ISL88707, ISL88708
(8 LD PDIP/SOIC)
TOP VIEW
MR 1
VDD 2
GND 3
PFI 4
8 RST
7 RST
6 CPOR
5 PFO
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL88705, ISL88706, ISL88707, ISL88708, 8SL88716, ISL88813
Absolute Maximum Ratings
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on any Pin with Respect to GND . . . . . . . . . . . -1.0V to +7V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C
Recommended Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C
Thermal Information
Thermal Resistance (Typical, Note 3)
PDIP Package* (4-layer test board) . . . . . . . . . . . . .
SOIC Package (4-layer test board) . . . . . . . . . . . . .
θJA (°C/W)
83
110
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings
provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification are not implied.
For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some
performance characteristics may degrade when the device is not operated under the listed test conditions.
NOTE:
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Over the recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP
VDD
IDD
Supply Voltage Range
ILI Input Leakage Current (PFI)
ILO Output Leakage Current
VOLTAGE THRESHOLDS
VDD = 5V, WDT Inactive
VDD = 3V, WDT Inactive
2.0
10
8
VTH1
Fixed VDD Voltage Trip Point
4.556
4.301
4.640
4.380
3.034
3.090
2.867
2.920
2.583
2.630
VTH1HYST Hysteresis at VTH1 Input
Temperature = +25°C
RST AND RST
VTH1 = 4.64V
VTH1 = 4.38V
VTH1 = 3.09V
VTH1 = 2.92V
VTH1 = 2.63V
46
44
37
29
31
VOL Reset Output Voltage Low
VOH
RST Output Voltage High
RST Output Voltage High
tRPD
tPOR
CLOAD
VTH to Reset Asserted Delay
POR Time-Out Delay
Load Capacitance on Reset Pins
VDD ≥ 3.3V, Sinking 2.5mA
VDD < 3.3V, Sinking 1.5mA
VDD ≥ 3.3V, Sourcing 2.5mA
VDD < 3.3V, Sourcing 1.5mA
VDD ≥ 3.3V, Sourcing 0.8mA
VDD < 3.3V, Sourcing 0.5mA
CPOR is open
VDD-0.6
VDD-0.6
VDD-0.6
VDD-0.6
140
0.05
0.05
VDD-0.4
VDD-0.4
VDD-0.4
VDD-0.4
45
200
5
MAX
5.5
19
10
100
100
4.724
4.459
3.146
2.973
2.677
0.40
0.40
260
UNITS
V
µA
µA
nA
nA
V
V
V
V
V
mV
mV
mV
mV
mV
V
V
V
V
V
V
µs
ms
pF
5 FN8092.3
December 6, 2006
5 Page 
ISL88705, ISL88706, ISL88707, ISL88708, 8SL88716, ISL88813
+5V
R1
R2
VDD
MR
PFI PFO
100k
RST
-5V ISL8870X
100k
2N3904
FIGURE 15. ISL88075EVAL1
Bipolar Voltage Sensing
Any of the ISL88705 - ISL88813 devices can be used to
sense and report the presence of both a positive and
negative voltage via the PFI and PFO as shown in Figure 16.
The VDD monitors the positive voltage as normal and the
PFI monitors the presence of the negative supply. As the
differential voltage across the R1, R2 divider is increased the
resistor values must be chosen such that the PFI node is
<1.25V when the -V supply is satisfactory and the positive
supply is at its maximum specified value. This allows the
positive supply to fluctuate within its acceptable range
without signaling a reset. Driving the MR with the inverted
PFO signal as shown provides for reset generation when -V
is not satisfactorily present. Reset will remain asserted as
long as PFO is high.
RESET
V+
V-
FIGURE 16. ±5V MONITORING
Special Application Considerations
Using good decoupling practices will prevent transients
(i.e., due to switching noises and short duration droops in the
supply voltage) from causing unwanted resets.
When using the CPOR pin, avoid stray capacitance during
layout as much as possible in order to minimize its effect on
the tPOR timing.
11 FN8092.3
December 6, 2006
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet ISL88716.PDF ] | |
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