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PDF ISL84781 Data sheet ( Hoja de datos )

Número de pieza ISL84781
Descripción 8 to 1 Analog Multiplexer
Fabricantes Intersil Corporation 
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®
Data Sheet
July 31, 2006
ISL84781
FN6095.3
Ultra Low ON-Resistance, Low-Voltage,
Single Supply, 8 to 1 Analog Multiplexer
The Intersil ISL84781 device contains precision, bidirectional,
analog switches configured as an 8 channel
multiplexer/demultiplexer. It is designed to operate from a
single +1.6V to +3.6V supply. The device has an inhibit pin to
simultaneously open all signal paths.
ON resistance is 0.4Ω with a +3.0V supply and 0.55Ω with a
single +1.8V supply. Each switch can handle rail to rail
analog signals. The off-leakage current is only 4nA max at
+25°C or 40nA max at +85°C with a +3.3V supply.
All digital inputs are 1.8V logic-compatible when using a
single +3V supply.
The ISL84781 is a 8 to 1 multiplexer device that is offered in a
16 Ld TSSOP package, and a 16 Ld thin QFN package.
Table 1 summarizes the performance of this family.
TABLE 1. FEATURES AT A GLANCE
ISL84781
Configuration
8:1 Mux
www.DataSheet4U.com
3V RON
3V tON/tOFF
1.8V RON
1.8V tON/tOFF
Packages
0.4Ω
16ns/13ns
0.55Ω
24ns/16ns
16 Ld TSSOP, 16 Ld 3x3 thin QFN
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
Features
• Pin Compatible Replacement for the MAX4781, and
MAX4617
• ON Resistance (RON)
- V+ = +3.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4Ω
- V+ = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.55Ω
• RON Matching Between Channels. . . . . . . . . . . . . . . . 0.12Ω
• RON Flatness Across Signal Range . . . . . . . . . . . . . .0.056Ω
• Single Supply Operation. . . . . . . . . . . . . . . . . +1.6V to +3.6V
• Low Power Consumption (PD). . . . . . . . . . . . . . . . . . <0.2µW
• Fast Switching Action (VS = +3V)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13ns
• Guaranteed Break-Before-Make
• High Current Handling Capacity (300mA Continuous)
• Available in 16 Ld TSSOP and 16 Ld 3x3 Thin QFN
• 1.8V CMOS-Logic Compatible (+3V Supply)
• Pb-Free Plus Anneal Available (RoHS Compliant)
• ISL84781IR Replaces the ISL43L680IR.
Applications
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones
- Pagers
- Laptops, Notebooks, Palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio Switching and Routing
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 page




ISL84781 pdf
ISL84781
Test Circuits and Waveforms
LOGIC
INPUT
V+
0V
50%
tON
tr < 5ns
tf < 5ns
VNO0
SWITCH
OUTPUT
0V
tOFF
90% VOUT
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. INHIBIT tON/tOFF MEASUREMENT POINTS
C
VNO0
LOGIC
INPUT
V+
C
NO0
NO1-NO7
COM
INH
GND ADD2-0
VOUT
RL CL
50Ω 35pF
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT
=
V NOx
------------R-----L-------------
RL + R(ON)
FIGURE 1B. INHIBIT tON/tOFF TEST CIRCUIT
LOGIC
INPUT
V+
0V
50%
tTRANS
tr < 5ns
tf < 5ns
VNO0
VOUT
90%
SWITCH
OUTPUT
VNO7
10%
0V
tTRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
V+
CC
VNO0
LOGIC
INPUT
NO0
NO1-NO7
COM
ADD2-0 GND INH
VOUT
RL CL
50Ω 35pF
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT = VNOx
------------R-----L-------------
RL + R(ON)
FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
LOGIC
INPUT
OFF
ON
SWITCH
OUTPUT
VOUT
Q = ΔVOUT x CL
OFF
V+
0V
ΔVOUT
RG
NOx
COM
0Ω
ADD2
VG
ADD1
ADD0 GND
INH
CHANNEL
SELECT
LOGIC
INPUT
FIGURE 2A. Q MEASUREMENT POINTS
Repeat test for other switches.
FIGURE 2B. Q TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
VOUT
CL
1000pF
5 FN6095.3
July 31, 2006

5 Page





ISL84781 arduino
ISL84781
Thin Shrink Small Outline Plastic Packages (TSSOP)
N
INDEX
AREA
E1
-B-
E
0.25(0.010) M B M
GAUGE
PLANE
123
0.05(0.002) SEATING PLANE
-A- D
A
0.25
0.010
L
-C-
e A1
b
0.10(0.004) M C A M B S
α
A2
0.10(0.004)
c
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact. (Angles in degrees)
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
-
0.043
-
1.10
-
A1 0.002 0.006 0.05 0.15
-
A2
0.033 0.037 0.85
0.95
-
b
0.0075 0.012 0.19
0.30
9
c
0.0035 0.008 0.09
0.20
-
D
0.193 0.201 4.90
5.10
3
E1
0.169 0.177 4.30
4.50
4
e 0.026 BSC
0.65 BSC
-
E
0.246 0.256 6.25
6.50
-
L
0.020 0.028 0.50
0.70
6
N 16
16 7
α 0o 8o 0o 8o -
Rev. 1 2/02
11 FN6095.3
July 31, 2006

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